Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

Vol. 3A 8-11
ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (APIC)
8.4.4 Local APIC Status and Location
The status and location of the local APIC are contained in the IA32_APIC_BASE MSR
(see Figure 8-5). MSR bit functions are described below:
• BSP flag, bit 8 ⎯ Indicates if the processor is the bootstrap processor (BSP).
See Section 7.5, “Multiple-Processor (MP) Initialization.” Following a power-up or
RESET, this flag is set to 1 for the processor selected as the BSP and set to 0 for
the remaining processors (APs).
• APIC Global Enable flag, bit 11 ⎯ Enables or disables the local APIC (see
Section 8.4.3, “Enabling or Disabling the Local APIC”). This flag is available in the
Pentium 4, Intel Xeon, and P6 family processors. It is not guaranteed to be
available or available at the same location in future Intel 64 or IA-32 processors.
• APIC Base field, bits 12 through 35 ⎯ Specifies the base address of the APIC
registers. This 24-bit value is extended by 12 bits at the low end to form the base
address. This automatically aligns the address on a 4-KByte boundary. Following
a power-up or RESET, the field is set to FEE0 0000H.
• Bits 0 through 7, bits 9 and 10, and bits 36 through 63 in the IA32_APIC_BASE
MSR are reserved.
8.4.5 Relocating the Local APIC Registers
The Pentium 4, Intel Xeon, and P6 family processors permit the starting address of
the APIC registers to be relocated from FEE00000H to another physical address by
modifying the value in the 24-bit base address field of the IA32_APIC_BASE MSR.
This extension of the APIC architecture is provided to help resolve conflicts with
memory maps of existing systems and to allow individual processors in an MP system
to map their APIC registers to different locations in physical memory.
Figure 8-5. IA32_APIC_BASE MSR (APIC_BASE_MSR in P6 Family)
BSP—Processor is BSP
APIC global enable/disable
APIC Base—Base physical address
63 071011 8912
Reserved
36 35
APIC Base
Reserved