Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

8-12 Vol. 3A
ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (APIC)
8.4.6 Local APIC ID
At power up, system hardware assigns a unique APIC ID to each local APIC on the
system bus (for Pentium 4 and Intel Xeon processors) or on the APIC bus (for P6
family and Pentium processors). The hardware assigned APIC ID is based on system
topology and includes encoding for socket position and cluster information (see
Figure 7-2).
In MP systems, the local APIC ID is also used as a processor ID by the BIOS and the
operating system. Some processors permit software to modify the APIC ID. However,
the ability of software to modify the APIC ID is processor model specific. Because of
this, operating system software should avoid writing to the local APIC ID register. The
value returned by bits 31-24 of the EBX register (when the CPUID instruction is
executed with a source operand value of 1 in the EAX register) is always the Initial
APIC ID (determined by the platform initialization). This is true even if software has
changed the value in the Local APIC ID register.
The processor receives the hardware assigned APIC ID (or Initial APIC ID) by
sampling pins A11# and A12# and pins BR0# through BR3# (for the Pentium 4, Intel
Xeon, and P6 family processors) and pins BE0# through BE3# (for the Pentium
processor). The APIC ID latched from these pins is stored in the APIC ID field of the
local APIC ID register (see Figure 8-6), and is used as the Initial APIC ID for the
processor.
For the P6 family and Pentium processors, the local APIC ID field in the local APIC ID
register is 4 bits. Encodings 0H through EH can be used to uniquely identify 15
different processors connected to the APIC bus. For the Pentium 4 and Intel Xeon
processors, the xAPIC specification extends the local APIC ID field to 8 bits. These
can be used to identify up to 255 processors in the system.
Figure 8-6. Local APIC ID Register
31
0
2324
ReservedAPIC ID*
Address: 0FEE0 0020H
Value after reset: 0000 0000H
* For the P6 family and Pentium processors,
bits 28-31 are reserved. For Pentium 4
and Xeon processors, 21-31 are reserved.