Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

Vol. 3A 8-37
ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (APIC)
1. (IPIs only) It examines the IPI message to determines if it is the specified
destination for the IPI as described in Section 8.6.2, “Determining IPI Desti-
nation.” If it is the specified destination, it continues its acceptance procedure; if
it is not the destination, it discards the IPI message. When the message
specifies lowest-priority delivery mode, the local APIC will arbitrate with the
other processors that were designated on recipients of the IPI message (see
Section 8.6.2.4, “Lowest Priority Delivery Mode”).
2. If the local APIC determines that it is the designated destination for the interrupt
and if the interrupt request is an NMI, SMI, INIT, ExtINT, or INIT-deassert
Figure 8-17. Interrupt Acceptance Flow Chart for the Local APIC (P6 Family and
Pentium Processors)
Wait to Receive
Belong
to
Is it
NMI/SMI/INIT
/
Delivery
Am
I
Other
Is Interrupt
Is Status
Discard
Accept
Yes
Yes
Accept
Is
Interrupt Slot
Arbitrate
Yes
Am I
Accept
Yes
No
Set Status
No
No
Yes
Set Status
No
Discard
No
Accept
Yes
Lowest
Fixed
Yes No
No
Yes
No
P6 Family