Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

1-2 Vol. 3A
ABOUT THIS MANUAL
Dual-Core Intel
®
Xeon
®
processor LV
Intel
®
Core
TM
2 Duo processor
Intel
®
Xeon
®
processor 5100 series
P6 family processors are IA-32 processors based on the P6 family microarchitecture.
This includes the Pentium
®
Pro, Pentium
®
II, Pentium
®
III, and Pentium
®
III Xeon
®
processors.
The Pentium
®
4, Pentium
®
D, and Pentium
®
processor Extreme Editions are based
on the Intel NetBurst
®
microarchitecture. Most early Intel
®
Xeon
®
processors are
based on the Intel NetBurst
®
microarchitecture.
The Intel
®
Core
TM
Duo, Intel
®
Core
TM
Solo and dual-core Intel
®
Xeon
®
processor LV
are based on an improved Pentium
®
M processor microarchitecture. The Intel
®
Xeon
®
processor 5100 series, Intel
®
Core
TM
2 Duo, and Intel
®
Core
TM
2 Extreme
processors are based on Intel
®
Core
TM
microarchitecture.
P6 family, Pentium
®
M, Intel
®
Core
TM
Solo, Intel
®
Core
TM
Duo processors, dual-core
Intel
®
Xeon
®
processor LV, and early generations of Pentium 4 and Intel Xeon
processors support IA-32 architecture.
The Intel
®
Xeon
®
processor 5100 series, Intel
®
Core
TM
2 Duo, Intel
®
Core
TM
2
Extreme processors, newer generations of Pentium 4 and Intel Xeon processor family
support Intel
®
64 architecture.
IA-32 architecture is the instruction set architecture and programming environment
for Intel's 32-bit microprocessors. Intel
®
64 architecture is the instruction set archi-
tecture and programming environment which is a superset of and compatible with
IA-32 architecture.
1.2 OVERVIEW OF THE SYSTEM PROGRAMMING GUIDE
A description of this manual’s content follows:
Chapter 1 — About This Manual. Gives an overview of all five volumes of the
Intel® 64 and IA-32 Architectures Software Developer’s Manual. It also describes
the notational conventions in these manuals and lists related Intel manuals and
documentation of interest to programmers and hardware designers.
Chapter 2 — System Architecture Overview. Describes the modes of operation
used by Intel 64 and IA-32 processors and the mechanisms provided by the architec-
tures to support operating systems and executives, including the system-oriented
registers and data structures and the system-oriented instructions. The steps neces-
sary for switching between real-address and protected modes are also identified.
Chapter 3 — Protected-Mode Memory Management. Describes the data struc-
tures, registers, and instructions that support segmentation and paging. The chapter
explains how they can be used to implement a “flat” (unsegmented) memory model
or a segmented memory model.