Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

9-52 Vol. 3A
PROCESSOR MANAGEMENT AND INITIALIZATION
{
Load Update.UpdateData into the Processor;
Verify update was correctly loaded into the processor
Go on to next processor
Break;
}
Else If (Update.TotalSize > (Update.DataSize + 48))
{
N ← 0
While (N < Update.ExtendedSignatureCount)
{
If ((Update.ProcessorSignature[N] ==
Processor Signature) &&
(Update.ProcessorFlags[N] & Platform Bits))
{
Load Update.UpdateData into the Processor;
Verify update was correctly loaded into the processor
Go on to next processor
Break;
}
N ← N + 1
}
I ← I + (Update.TotalSize / 2048)
If ((Update.TotalSize MOD 2048) == 0)
I ← I + 1
}
}
}
}
NOTES
The platform Id bits in IA32_PLATFORM_ID are encoded as a three-
bit binary coded decimal field. The platform bits in the microcode
update header are individually bit encoded. The algorithm must do a
translation from one format to the other prior to doing a check.
When performing the INT 15H, 0D042H functions, the BIOS must assume that the
caller has no knowledge of platform specific requirements. It is the responsibility of
BIOS calls to manage all chipset and platform specific prerequisites for managing the
NVRAM device. When writing the update data using the Write Update sub-function,
the BIOS must maintain implementation specific data requirements (such as the
update of NVRAM checksum). The BIOS should also attempt to verify the success of
write operations on the storage device used to record the update.