Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1
10-38 Vol. 3A
MEMORY CACHE CONTROL
c. If two or more variable memory ranges match and one of the memory types
is UC, the UC memory type used.
d. If two or more variable memory ranges match and the memory types are WT
and WB, the WT memory type is used.
e. For overlaps not defined by the above rules, processor behavior is undefined.
3. If no fixed or variable memory range matches, the processor uses the default
memory type.
10.11.5 MTRR Initialization
On a hardware reset, the P6 and more recent processors clear the valid flags in vari-
able-range MTRRs and clear the E flag in the IA32_MTRR_DEF_TYPE MSR to disable
all MTRRs. All other bits in the MTRRs are undefined.
Prior to initializing the MTRRs, software (normally the system BIOS) must initialize all
fixed-range and variable-range MTRR register fields to 0. Software can then initialize
the MTRRs according to known types of memory, including memory on devices that it
auto-configures. Initialization is expected to occur prior to booting the operating
system.
See Section 10.11.8, “MTRR Considerations in MP Systems,” for information on
initializing MTRRs in MP (multiple-processor) systems.
10.11.6 Remapping Memory Types
A system designer may re-map memory types to tune performance or because a
future processor may not implement all memory types supported by the Pentium 4,
Intel Xeon, and P6 family processors. The following rules support coherent memory-
type re-mappings:
1. A memory type should not be mapped into another memory type that has a
weaker memory ordering model. For example, the uncacheable type cannot be
mapped into any other type, and the write-back, write-through, and write-
protected types cannot be mapped into the weakly ordered write-combining
type.
2. A memory type that does not delay writes should not be mapped into a memory
type that does delay writes, because applications of such a memory type may
rely on its write-through behavior. Accordingly, the write-back type cannot be
mapped into the write-through type.