Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

10-46 Vol. 3A
MEMORY CACHE CONTROL
10.12.3 Selecting a Memory Type from the PAT
To select a memory type for a page from the PAT, a 3-bit index made up of the PAT,
PCD, and PWT bits must be encoded in the page-table or page-directory entry for the
page. Table 10-11 shows the possible encodings of the PAT, PCD, and PWT bits and
the PAT entry selected with each encoding. The PAT bit is bit 7 in page-table entries
that point to 4-KByte pages (see Figures 3-14 and 3-20) and bit 12 in page-directory
entries that point to 2-MByte or 4-MByte pages (see Figures 3-15, 3-21, and 3-23).
The PCD and PWT bits are always bits 4 and 3, respectively, in page-table and page-
directory entries.
The PAT entry selected for a page is used in conjunction with the MTRR setting for the
region of physical memory in which the page is mapped to determine the effective
memory type for the page, as shown in Table 10-7.
Table 10-10. Memory Types That Can Be Encoded With PAT
Encoding Mnemonic
00H Uncacheable (UC)
01H Write Combining (WC)
02H Reserved*
03H Reserved*
04H Write Through (WT)
05H Write Protected (WP)
06H Write Back (WB)
07H Uncached (UC-)
08H - FFH Reserved*
NOTE:
* Using these encodings will result in a general-protection exception (#GP).
Table 10-11. Selection of PAT Entries with PAT, PCD, and PWT Flags
PAT PCD PWT PAT Entry
000PAT0
001PAT1
010PAT2
011PAT3
100PAT4
101PAT5
110PAT6
111PAT7