Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

12-8 Vol. 3A
SYSTEM PROGRAMMING FOR STREAMING SIMD INSTRUCTION SETS
method for saving and restoring this state. See Section 12.3, “Saving and Restoring
the SSE/SSE2/SSE3/SSSE3 State.” These instructions offer the added benefit of
saving x87 FPU and MMX state as well.
Guidelines for writing such procedures are in Section 12.5, “Designing OS Facilities
for AUTOMATICALLY Saving x87 FPU, MMX, and SSE/SSE2/SSE3/SSSE3 state on
Task or Context Switches.”
12.5 DESIGNING OS FACILITIES FOR AUTOMATICALLY
SAVING X87 FPU, MMX, AND SSE/SSE2/SSE3/SSSE3
STATE ON TASK OR CONTEXT SWITCHES
The x87 FPU/MMX/SSE/SSE2/SSE3/SSSE3 state consist of the state of the x87 FPU,
MMX, XMM, and MXCSR registers. The FXSAVE and FXRSTOR instructions provide a
fast method for saving ad restoring this state. If task or context switching facilities
are already implemented in an operating system or executive and they use
FSAVE/FNSAVE and FRSTOR to save the x87 FPU and MMX state, these facilities can
be extended to save and restore SSE/SSE2/SSE3/SSSE3 state by substituting
FXSAVE/FXRSTOR for FSAVE/FNSAVE and FRSTOR.
Where task or content switching facilities must be written from scratch, several
approaches can be taken for using the FXSAVE and FXRSTOR instructions to save and
restore x87 FPU/MMX/SSE/SSE2/SSE3/SSSE3 state:
• The operating system can require applications that are intended be run as tasks
take responsibility for saving the state of the x87 FPU, MMX, XMM, and MXCSR
registers prior to a task suspension during a task switch and for restoring the
registers when the task is resumed. This approach is appropriate for cooperative
multitasking operating systems, where the application has control over (or is able
to determine) when a task switch is about to occur and can save state prior to the
task switch.
• The operating system can take the responsibility for automatically saving the x87
FPU, MMX, XMM, and MXCSR registers as part of the task switch process (using
an FXSAVE instruction) and automatically restoring the state of the registers
when a suspended task is resumed (using an FXRSTOR instruction). Here, the
x87 FPU/MMX/SSE/SSE2/SSE3 state must be saved as part of the task state.
This approach is appropriate for preemptive multitasking operating systems,
where the application cannot know when it is going to be preempted and cannot
prepare in advance for task switching. Here, the operating system is responsible
for saving and restoring the task and the x87 FPU/MMX/SSE/SSE2/SSE3 state
when necessary.
• The operating system can take the responsibility for saving the x87 FPU, MMX,
XMM, and MXCSR registers as part of the task switch process, but delay the
saving of the MMX and x87 FPU state until an x87 FPU, MMX, or
SSE/SSE2/SSE3/SSSE3 instruction is actually executed by the new task. Using
this approach, the x87 FPU/MMX/SSE/SSE2/SSE3/SSSE3 state is saved only if an