Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

Vol. 3A 13-9
POWER AND THERMAL MANAGEMENT
13.4.2.5 Thermal Status Information
The status of the temperature sensor that triggers the thermal monitor (TM1/TM2) is
indicated through the thermal status flag and thermal status log flag in the
IA32_THERM_STATUS MSR (see Figure 13-5).
The functions of these flags are:
• Thermal Status flag, bit 0 — When set, indicates that the processor core
temperature is currently at the trip temperature of the thermal monitor and that
the processor power consumption is being reduced via either TM1 or TM2,
depending on which is enabled. When clear, the flag indicates that the core
temperature is below the thermal monitor trip temperature. This flag is read only.
• Thermal Status Log flag, bit 1 — When set, indicates that the thermal sensor
has tripped since the last power-up or reset or since the last time that software
cleared this flag. This flag is a sticky bit; once set it remains set until cleared by
software or until a power-up or reset of the processor. The default state is clear.
After the second temperature sensor has been tripped, the thermal monitor
(TM1/TM2) will remain engaged for a minimum time period (on the order of 1 ms).
The thermal monitor will remain engaged until the processor core temperature drops
below the preset trip temperature of the temperature sensor, taking hysteresis into
account.
While the processor is in a stop-clock state, interrupts will be blocked from inter-
rupting the processor. This holding off of interrupts increases the interrupt latency,
but does not cause interrupts to be lost. Outstanding interrupts remain pending until
clock modulation is complete.
The thermal monitor can be programmed to generate an interrupt to the processor
when the thermal sensor is tripped. The delivery mode, mask and vector for this
interrupt can be programmed through the thermal entry in the local APIC’s LVT (see
Section 8.5.1, “Local Vector Table”). The low-temperature interrupt enable and high-
temperature interrupt enable flags in the IA32_THERM_INTERRUPT MSR (see
Figure 13-6) control when the interrupt is generated; that is, on a transition from a
temperature below the trip point to above and/or vice-versa.
Figure 13-5. IA32_THERM_STATUS MSR
63 0
Reserved
12
Thermal Status
Thermal Status Log