Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

Vol. 3A 14-7
MACHINE-CHECK ARCHITECTURE
• Model-specific error code field, bits 31:16 — Specifies the model-specific
error code that uniquely identifies the machine-check error condition detected.
The model-specific error codes may differ among IA-32 processors for the same
machine-check error condition. See Appendix E, “Interpreting Machine-Check
Error Codes”for information on model-specific error codes.
• Reserved, Error Status, and Other Information fields, bits 56:32 —
• Bits 52:32 always contain “Other Information” that is implementation-
specific and is not part of the machine-check architecture. Software that
is intended to be portable among IA-32 processors should not rely on
these values.
• If IA32_MCG_CAP[11] is 0, bits 56:53 also contain “Other Information”
(in the same sense).
• If IA32_MCG_CAP[11] is 1, bits 56:53 are architectural (not model-
specific). In this case, bits 56:53 have the following functionality:
—Bits 56:55 are reserved for future architectural assignment.
—If the UC bit (Figure 14-5) is 1, bits 54:53 are undefined.
—If the UC bit (Figure 14-5) is 0, bits 54:53 indicate the status of the
hardware structure that reported the threshold-based error. See Table
14-1.
• PCC (processor context corrupt) flag, bit 57 — Indicates (when set) that the
state of the processor might have been corrupted by the error condition detected
and that reliable restarting of the processor may not be possible. When clear, this
flag indicates that the error did not affect the processor’s state.
• ADDRV (IA32_MCi_ADDR register valid) flag, bit 58 — Indicates (when set)
that the IA32_MCi_ADDR register contains the address where the error occurred
(see Section 14.3.2.3, “IA32_MCi_ADDR MSRs”). When clear, this flag indicates
that the IA32_MCi_ADDR register is either not implemented or does not contain
Table 14-1. Bits 54:53 in IA32_MCi_STATUS MSRs when IA32_MCG_CAP[11] = 1 and
UC = 0
Bits 54:53 Meaning
00 No tracking - No hardware status tracking is provided for the structure reporting this
event.
01 Green - Status tracking is provided for the structure posting the event; the current
status is green (below threshold). For more information, see Section 14.4, “Enhanced
Cache Error reporting”.
10 Yellow - Status tracking is provided for the structure posting the event; the current
status is yellow (above threshold). For more information, see Section 14.4,
“Enhanced Cache Error reporting”.
11 Reserved