Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

Vol. 3A 17-29

ARCHITECTURE COMPATIBILITY

• Invalid-opcode exception (#UD, interrupt 6) — New exception condition added.

Improper use of the LOCK instruction prefix can generate an invalid-opcode

exception.

• Page-fault exception (#PF, interrupt 14) — New exception condition added. If

paging is enabled in a 16-bit program, a page-fault exception can be generated

as follows. Paging can be used in a system with 16-bit tasks if all tasks use the

same page directory. Because there is no place in a 16-bit TSS to store the PDBR

so they can make full use of paging.

• General-protection exception (#GP, interrupt 13) — New exception condition

added. The Intel386 processor sets a limit of 15 bytes on instruction length. The

only way to violate this limit is by putting redundant prefixes before an

instruction. A general-protection exception is generated if the limit on instruction

length is violated. The 8086 processor has no instruction length limit.

17.24.1 Machine-Check Architecture

The Pentium Pro processor introduced a new architecture to the IA-32 for handling

and reporting on machine-check exceptions. This machine-check architecture

(described in detail in Chapter 14, “Machine-Check Architecture”) greatly expands

the ability of the processor to report on internal hardware errors.

17.24.2 Priority OF Exceptions

The priority of exceptions are broken down into several major categories:

1. Traps on the previous instruction

2. External interrupts

3. Faults on fetching the next instruction

4. Faults in decoding the next instruction

5. Faults on executing an instruction

There are no changes in the priority of these major categories between the different

processors, however, exceptions within these categories are implementation depen-

dent and may change from processor to processor.

17.25 INTERRUPTS

The following differences in handling interrupts are found among the IA-32

processors.