Intel 64 and IA-32 Architectures Software Developers Manual Volume 3A, System Programming Guide, Part 1

Vol. 3A 17-37
ARCHITECTURE COMPATIBILITY
For the P6 family processors, the MOV CR0, REG instruction is serializing, so the
jump operation is not required. However, for backwards compatibility, the JMP
instruction should still be included.
17.30 STACK OPERATIONS
This section identifies the differences in the stack mechanism for the various IA-32
processors.
17.30.1 Selector Pushes and Pops
When pushing a segment selector onto the stack, the Pentium 4, Intel Xeon, P6
family, and Intel486 processors decrement the ESP register by the operand size and
then write 2 bytes. If the operand size is 32-bits, the upper two bytes of the write are
not modified. The Pentium processor decrements the ESP register by the operand
size and determines the size of the write by the operand size. If the operand size is
32-bits, the upper two bytes are written as 0s.
When popping a segment selector from the stack, the Pentium 4, Intel Xeon, P6
family, and Intel486 processors read 2 bytes and increment the ESP register by the
operand size of the instruction. The Pentium processor determines the size of the
read from the operand size and increments the ESP register by the operand size.
It is possible to align a 32-bit selector push or pop such that the operation generates
an exception on a Pentium processor and not on an Pentium 4, Intel Xeon, P6 family,
or Intel486 processor. This could occur if the third and/or fourth byte of the operation
lies beyond the limit of the segment or if the third and/or fourth byte of the operation
is locate on a non-present or inaccessible page.
For a POP-to-memory instruction that meets the following conditions:
• The stack segment size is 16-bit.
• Any 32-bit addressing form with the SIB byte specifying ESP as the base register.
• The initial stack pointer is FFFCH (32-bit operand) or FFFEH (16-bit operand) and
will wrap around to 0H as a result of the POP operation.
The result of the memory write is implementation-specific. For example, in P6 family
processors, the result of the memory write is SS:0H plus any scaled index and
displacement. In Pentium processors, the result of the memory write may be either a
stack fault (real mode or protected mode with stack segment size of 64 KByte), or
write to SS:10000H plus any scaled index and displacement (protected mode and
stack segment size exceeds 64 KByte).