Intel 64 and IA-32 Architectures Software Developers Manual Volume 3B, System Programming Guide Part 2

Vol. 3 20-17
VIRTUAL-MACHINE CONTROL STRUCTURES
• Virtual-APIC address (64 bits). This field is the physical address of the 4-KByte
virtual-APIC page.
If the “use TPR shadow” VM-execution control is 1, the virtual-APIC address must
be 4-KByte aligned. The virtual-APIC page is accessed by the following
operations if the “use TPR shadow” VM-execution control is 1:
— The MOV CR8 instructions (see Section 21.1.3 and Section 21.4).
— Accesses to byte 80H on the APIC-access page if, in addition, the “virtualize
APIC accesses” VM-execution control is 1 (see Section 21.5.3).
— The RDMSR and WRMSR instructions if, in addition, the value of ECX is 808H
(indicating the TPR MSR) and the “virtualize x2APIC mode” VM-execution
control is 1 (see Section 21.4).
The virtual-APIC address exists only on processors that support the 1-setting of
the “use TPR shadow” VM-execution control.
• TPR threshold (32 bits). Bits 3:0 of this field determine the threshold below
which the TPR shadow (bits 7:4 of byte 80H of the virtual-APIC page) cannot fall.
A VM exit occurs after an operation (e.g., an execution of MOV to CR8) that
reduces the TPR shadow below this value. See Section 21.4 and Section 21.5.3.
The TPR threshold exists only on processors that support the 1-setting of the
“use TPR shadow” VM-execution control.
20.6.9 MSR-Bitmap Address
On processors that support the 1-setting of the “use MSR bitmaps” VM-execution
control, the VM-execution control fields include the 64-bit physical address of four
contiguous MSR bitmaps, which are each 1-KByte in size. This field does not exist
on processors that do not support the 1-setting of that control. The four bitmaps are:
• Read bitmap for low MSRs (located at the MSR-bitmap address). This contains
one bit for each MSR address in the range 00000000H – 00001FFFH. The bit
determines whether an execution of RDMSR applied to that MSR causes a
VM exit.
• Read bitmap for high MSRs (located at the MSR-bitmap address plus 1024).
This contains one bit for each MSR address in the range C0000000H –
C0001FFFH. The bit determines whether an execution of RDMSR applied to that
MSR causes a VM exit.
• Write bitmap for low MSRs (located at the MSR-bitmap address plus 2048).
This contains one bit for each MSR address in the range 00000000H –
00001FFFH. The bit determines whether an execution of WRMSR applied to that
MSR causes a VM exit.
• Write bitmap for high MSRs (located at the MSR-bitmap address plus 3072).
This contains one bit for each MSR address in the range C0000000H –
C0001FFFH. The bit determines whether an execution of WRMSR applied to that
MSR causes a VM exit.