Intel 64 and IA-32 Architectures Software Developers Manual Volume 3B, System Programming Guide Part 2

20-32 Vol. 3
VIRTUAL-MACHINE CONTROL STRUCTURES
— A VMREAD returns the value of bits 63:32 of the field in bits 31:0 of the
destination operand; in 64-bit mode, bits 63:32 of the destination operand
are cleared to 0.
— A VMWRITE writes the value of bits 31:0 of the source operand to bits 63:32
of the field; in 64-bit mode, bits 63:32 of the source operand are not used.
Software seeking to read a 64-bit field outside IA-32e mode can use VMREAD with
the full access type (reading bits 31:0 of the field) and VMREAD with the high access
type (reading bits 63:32 of the field); the order of the two VMREAD executions is not
important. Software seeking to modify a 64-bit field outside IA-32e mode should first
use VMWRITE with the full access type (establishing bits 31:0 of the field while
clearing bits 63:32) and then use VMWRITE with the high access type (establishing
bits 63:32 of the field).
20.10.3 Software Access to Related Structures
In addition to data in the VMCS region itself, VMX non-root operation can be
controlled by data structures that are referenced by pointers in a VMCS (for example,
the I/O bitmaps). Note that, while the pointers to these data structures are parts of
the VMCS, the data structures themselves are not. They are not accessible using
VMREAD and VMWRITE but by ordinary memory writes.
Software should ensure that each such data structure is modified only when no
logical processor with a current VMCS that references it is in VMX non-root operation.
Doing otherwise may lead to unpredictable behavior (including behaviors identified in
Section 20.10.1).
20.10.4 VMXON Region
Before executing VMXON, software allocates a region of memory (called the VMXON
region)
1
that the logical processor uses to support VMX operation. The physical
address of this region (the VMXON pointer) is provided in an operand to VMXON. The
VMXON pointer is subject to the limitations that apply to VMCS pointers:
• The VMXON pointer must be 4-KByte aligned (bits 11:0 must be zero).
• On processors that support Intel 64 architecture, the VMXON pointer must not
set any bits beyond the processor’s physical-address width.
2
On processors that
do not support Intel 64 architecture, the VMXON pointer must not set any bits in
the range 63:32.
1. The amount of memory required for the VMXON region is the same as that required for a VMCS
region. This size is implementation specific and can be determined by consulting the VMX capa-
bility MSR IA32_VMX_BASIC (see Appendix G.1).
2. Software can determine a processor’s physical-address width by executing CPUID with
80000008H in EAX. The physical-address width is returned in bits 7:0 of EAX.