Intel 64 and IA-32 Architectures Software Developers Manual Volume 3B, System Programming Guide Part 2

21-14 Vol. 3
VMX NON-ROOT OPERATION
the IDT. (If a logical processor is in the wait-for-SIPI state, NMIs are blocked. The
NMI is not delivered through the IDT and no VM exit occurs.)
• INIT signals. INIT signals cause VM exits. A logical processor performs none of
the operations normally associated with these events. Such exits do not modify
register state or clear pending events as they would outside of VMX operation. (If
a logical processor is in the wait-for-SIPI state, INIT signals are blocked. They do
not cause VM exits in this case.)
• Start-up IPIs (SIPIs). SIPIs cause VM exits. If a logical processor is not in
the wait-for-SIPI activity state when a SIPI arrives, no VM exit occurs and the
SIPI is discarded. VM exits due to SIPIs do not perform any of the normal
operations associated with those events: they do not modify register state as
they would outside of VMX operation. (If a logical processor is not in the wait-for-
SIPI state, SIPIs are blocked. They do not cause VM exits in this case.)
• Task switches. Task switches are not allowed in VMX non-root operation. Any
attempt to effect a task switch in VMX non-root operation causes a VM exit. See
Section 21.6.2.
• System-management interrupts (SMIs). If the logical processor is using the
dual-monitor treatment of SMIs and system-management mode (SMM), SMIs
cause SMM VM exits. See Section 25.15.2.
1
• VMX-preemption timer. A VM exit occurs when the timer counts down to zero.
See Section 21.7.1 for details of operation of the VMX-preemption timer. As noted
in that section, the timer does not cause VM exits if the logical processor is
outside the C-states C0, C1, and C2.
Debug-trap exceptions and higher priority events take priority over VM exits
caused by the VMX-preemption timer. VM exits caused by the VMX-preemption
timer take priority over VM exits caused by the “NMI-window exiting”
VM-execution control and lower priority events.
These VM exits wake a logical processor from the same inactive states as would
an external interrupt. Specifically, they wake a logical processor from the states
entered using the HLT and MWAIT instructions. These VM exits do not occur if the
logical processor is in the shutdown state or the wait-for-SIPI state.
In addition, there are controls that cause VM exits based on the readiness of guest
software to receive interrupts:
• If the “interrupt-window exiting” VM-execution control is 1, a VM exit occurs
before execution of any instruction if RFLAGS.IF = 1 and there is no blocking of
events by STI or by MOV SS (see Table 20-3). Such a VM exit occurs immediately
after VM entry if the above conditions are true (see Section 22.6.5).
1. Under the dual-monitor treatment of SMIs and SMM, SMIs also cause SMM VM exits if they occur
in VMX root operation outside SMM. If the processor is using the default treatment of SMIs and
SMM, SMIs are delivered as described in Section 25.14.1.