Intel 64 and IA-32 Architectures Software Developers Manual Volume 3B, System Programming Guide Part 2

Vol. 3 22-25
VM ENTRIES
• The transition causes a last-branch record to be logged if the LBR bit is set in the
IA32_DEBUGCTL MSR. This is true even for events such as debug exceptions,
which normally clear the LBR bit before delivery.
• The last-exception record MSRs (LERs) may be updated based on the setting of
the LBR bit in the IA32_DEBUGCTL MSR. Events such as debug exceptions, which
normally clear the LBR bit before they are delivered, and therefore do not
normally update the LERs, may do so as part of VM-entry event injection.
• If injection of an event encounters a nested exception that does not itself cause a
VM exit, the value of the EXT bit (bit 0) in any error code pushed on the stack is
determined as follows:
— If event being injected has interruption type external interrupt, NMI,
hardware exception, or privileged software exception and encounters a
nested exception (but does not produce a double fault), the error code for the
first such exception encountered sets the EXT bit.
— If event being injected is a software interrupt or an software exception and
encounters a nested exception (but does not produce a double fault), the
error code for the first such exception encountered clears the EXT bit.
— If event delivery encounters a nested exception and delivery of that
exception encounters another exception (but does not produce a double
fault), the error code for that exception sets the EXT bit. If a double fault is
produced, the error code for the double fault is 0000H (the EXT bit is clear).
22.5.1.2 VM Exits During Event Injection
An event being injected never causes a VM exit directly regardless of the settings of
the VM-execution controls. For example, setting the “NMI exiting” VM-execution
control to 1 does not cause a VM exit due to injection of an NMI.
However, the event-delivery process may lead to a VM exit:
• If the vector in the VM-entry interruption-information field identifies a task gate
in the IDT, the attempted task switch may cause a VM exit just as it would had
the injected event occurred during normal execution in VMX non-root operation
(see Section 21.6.2).
• If event delivery encounters a nested exception, a VM exit may occur depending
on the contents of the exception bitmap (see Section 21.3).
• If event delivery generates a double-fault exception (due to a nested exception);
the logical processor encounters another nested exception while attempting to
call the double-fault handler; and that exception does not cause a VM exit due to
the exception bitmap; then a VM exit occurs due to triple fault (see Section
21.3).
• If event delivery injects a double-fault exception and encounters a nested
exception that does not cause a VM exit due to the exception bitmap, then a
VM exit occurs due to triple fault (see Section 21.3).