Intel 64 and IA-32 Architectures Software Developers Manual Volume 3B, System Programming Guide Part 2

23-30 Vol. 3
VM EXITS
• The activity-state field is saved with the logical processor’s activity state before
the VM exit.
1
See Section 23.1 for details of how events leading to a VM exit may
affect the activity state.
• The interruptibility-state field is saved to reflect the logical processor’s interrupt-
ibility before the VM exit. See Section 23.1 for details of how events leading to a
VM exit may affect this state. VM exits that end outside system-management
mode (SMM) save bit 2 (blocking by SMI) as 0 regardless of the state of such
blocking before the VM exit.
Bit 3 (blocking by NMI) is treated specially if the “virtual NMIs” VM-execution
control is 1. In this case, the value saved for this field does not indicate the
blocking of NMIs but rather the state of virtual-NMI blocking.
• The pending debug exceptions field is saved as clear for all VM exits except the
following:
— A VM exit caused by an INIT signal, a machine-check exception, or a system-
management interrupt (SMI).
— A VM exit with basic exit reason either “TPR below threshold.”
2
— A VM exit with basic exit reason “monitor trap flag.”
— VM exits that are not caused by debug exceptions and that occur while there
is MOV-SS blocking of debug exceptions.
For VM exits that do not clear the field, the value saved is determined as follows:
— Each of bits 3:0 may be set if it corresponds to a matched breakpoint. This
may be true even if the corresponding breakpoint is not enabled in DR7.
— Suppose that a VM exit is due to an INIT signal, a machine-check exception,
or an SMI; or that a VM exit has basic exit reason “TPR below threshold” or
“monitor trap flag.” In this case, the value saved sets bits corresponding to
the causes of any debug exceptions that were pending at the time of the
VM exit.
If the VM exit occurs immediately after VM entry, the value saved may match
that which was loaded on VM entry (see Section 22.6.3). Otherwise, the
following items apply:
• Bit 12 (enabled breakpoint) is set to 1 if there was at least one matched
data or I/O breakpoint that was enabled in DR7. Bit 12 is also set if it had
been set on VM entry, causing there to be valid pending debug exceptions
(see Section 22.6.3) and the VM exit occurred before those exceptions
were either delivered or lost. In other cases, bit 12 is cleared to 0.
• Bit 14 (BS) is set if RFLAGS.TF = 1 in either of the following cases:
1. If this activity state was an inactive state resulting from execution of a specific instruction (HLT
or MWAIT), the value saved for RIP by that VM exit will reference the following instruction.
2. This item includes VM exits that occur after executions of MOV to CR8 or WRMSR (Section
21.1.3), TPR-shadow updates (Section 21.5.3.3), and certain VM entries (Section 22.6.7).