Intel 64 and IA-32 Architectures Software Developers Manual Volume 3B, System Programming Guide Part 2

24-20 Vol. 3
SUPPORT FOR ADDRESS TRANSLATION
— The INVVPID type is individual-address (0).
— The VPID in the INVVPID descriptor is the one assigned to the virtual
processor whose execution is being emulated.
— The linear address in the INVVPID descriptor is that of the operand of the
INVLPG instruction being emulated.
• Some instructions invalidate all entries in the TLBs and paging-structure
caches—except for global translations. An example is the MOV to CR3 instruction.
(See Section 3.12, “Translation Lookaside Buffers (TLBs)” for details regarding
global translations.) Emulation of such an instruction may require execution of
the INVVPID instruction as follows:
— The INVVPID type is single-context-retaining-globals (3).
— The VPID in the INVVPID descriptor is the one assigned to the virtual
processor whose execution is being emulated.
• Some instructions invalidate all entries in the TLBs and paging-structure
caches—including for global translations. An example is the MOV to CR4
instruction if the value of value of bit 4 (page global enable—PGE) is changing.
Emulation of such an instruction may require execution of the INVVPID
instruction as follows:
— The INVVPID type is single-context (1).
— The VPID in the INVVPID descriptor is the one assigned to the virtual
processor whose execution is being emulated.
If EPT is in use, the instructions enumerated above may not be configured to cause
VM exits and the VMM may not be emulating them. In that case, execution of the
instructions by guest software will properly invalidate the required entries in the TLBs
and paging-structure caches (see Section 24.3.3.1); execution of the INVVPID
instruction is not required.
The following guidelines apply more generally and are appropriate even if EPT is in
use:
• As detailed in Section 21.2.1.1, an access to the APIC-access page might not
cause an APIC-access VM exit if software does not properly invalidate information
that may be cached from the paging structures. If, at one time, the current VPID
on a logical processor was a non-zero value X, it is recommended that software
use the INVVPID instruction with the “single-context” INVVPID type and with
VPID X in the INVVPID descriptor before a VM entry on the same logical
processor that establishes VPID X and either (a) the “virtualize APIC accesses”
VM-execution control was changed from 0 to 1; or (b) the value of the APIC-
access address was changed.
• Software can use the INVVPID instruction with the “all-context” INVVPID type
immediately after execution of the VMXON instruction or immediately prior to
execution of the VMXOFF instruction. Either prevents potentially undesired
retention of information cached from paging structures between separate uses of
VMX operation.