Intel 64 and IA-32 Architectures Software Developers Manual Volume 3B, System Programming Guide Part 2

Vol. 3 26-23
VIRTUAL-MACHINE MONITOR PROGRAMMING CONSIDERATIONS
26.10.4 Handling Special-Case MSRs and Instructions
A number of instructions make use of designated MSRs in their operation. The VMM
may need to consider saving the states of those MSRs. Instructions that merit such
consideration include SYSENTER/SYSEXIT, SYSCALL/SYSRET, SWAPGS.
26.10.4.1 Handling IA32_EFER MSR
The IA32_EFER MSR includes bit fields that allow system software to enable
processor features. For example: the SCE bit enables SYSCALL/SYSRET and the NXE
bit enables the execute-disable bits in the paging-structure entries.
VMX provides hardware support to load the IA32_EFER MSR on VMX transitions and
to save it on VM exits. Because of this, VMM software need not use the RDMSR and
WRMSR instruction to give the register different values during host and guest execu-
tion.
26.10.4.2 Handling the SYSENTER and SYSEXIT Instructions
The SYSENTER and SYSEXIT instructions use three dedicated MSRs
(IA32_SYSENTER_CS, IA32_SYSENTER_ESP and IA32_SYSENTER_EIP) to manage
fast system calls. These MSRs may be utilized by both the VMM and the guest OS to
manage system calls in VMX root operation and VMX non-root operation respectively.
VM entries load these MSRs from fields in the guest-state area of the VMCS. VM exits
save the values of these MSRs into those fields and loads the MSRs from fields in the
host-state area.
26.10.4.3 Handling the SYSCALL and SYSRET Instructions
The SYSCALL/SYSRET instructions are similar to SYSENTER/SYSEXIT but are
designed to operate within the context of a 64-bit flat code segment. They are avail-
able only in 64-bit mode and only when the SCE bit of the IA32_EFER MSR is set.
SYSCALL/SYSRET invocations can occur from either 32-bit compatibility mode appli-
cation code or from 64-bit application code. Three related MSR registers
(IA32_STAR, IA32_LSTAR, IA32_FMASK) are used in conjunction with fast system
calls/returns that use these instructions.
64-Bit hosts which make use of these instructions in the VMM environment will need
to save the guest state of the above registers on VM exit, load the host state, and
restore the guest state on VM entry. One possible approach is to use the VM-exit
MSR-save and MSR-load areas and the VM-entry MSR-load area defined by controls
in the VMCS. A disadvantage to this approach, however, is that the approach results
in the unconditional saving, loading, and restoring of MSR registers on each VM exit
or VM entry.
Depending on the design of the VMM, it is likely that many VM-exits will require no
fast system call support but the VMM will be burdened with the additional overhead
of saving and restoring MSRs if the VMM chooses to support fast system call