Intel 64 and IA-32 Architectures Software Developers Manual Volume 3B, System Programming Guide Part 2

Vol. 3 27-5
VIRTUALIZATION OF SYSTEM RESOURCES
inconsistencies can be solved using techniques analogous to those used by the
processor and its TLB.
This section describes an alternative approach that allows guest software to freely
access page directories and page tables. Traps occur on CR3 accesses and executions
of INVLPG. They also occur when necessary to ensure that guest modifications to the
translation structures actually take effect. The software mechanisms to support this
approach are collectively called virtual TLB. This is because they emulate the func-
tionality of the processor’s physical translation look-aside buffer (TLB).
The basic idea behind the virtual TLB is similar to that behind the processor TLB.
While the page-table hierarchy defines the relationship between physical to linear
address, it does not directly control the address translation of each memory access.
Instead, translation is controlled by the TLB, which is occasionally filled by the
processor with translations derived from the page-table hierarchy. With a virtual TLB,
the page-table hierarchy established by guest software (specifically, the guest oper-
ating system) does not control translation, either directly or indirectly. Instead,
translation is controlled by the processor (through its TLB) and by the VMM (through
a page-table hierarchy that it maintains).
Specifically, the VMM maintains an alternative page-table hierarchy that effectively
caches translations derived from the hierarchy maintained by guest software. The
remainder of this document refers to the former as the active page-table hierarchy
(because it is referenced by CR3 and may be used by the processor to load its TLB)
and the latter as the guest page-table hierarchy (because it is maintained by guest
software). The entries in the active hierarchy may resemble the corresponding
entries in the guest hierarchy in some ways and may differ in others.
Guest software is allowed to freely modify the guest page-table hierarchy without
causing VM exits to the VMM. Because of this, the active page-table hierarchy might
not always be consistent with the guest hierarchy. Any potential problems arising
from any inconsistencies can be solved using techniques analogous to those used by
the processor and its TLB. Note the following:
• Suppose the guest page-table hierarchy allows more access than active hierarchy
(for example: there is a translation for a linear address in the guest hierarchy but
not in the active hierarchy); this is analogous to a situation in which the TLB
allows less access than the page-table hierarchy. If an access occurs that would
be allowed by the guest hierarchy but not the active one, a page fault occurs; this
is analogous to a TLB miss. The VMM gains control (as it handles all page faults)
and can update the active page-table hierarchy appropriately; this corresponds
to a TLB fill.
• Suppose the guest page-table hierarchy allows less access than the active
hierarchy; this is analogous to a situation in which the TLB allows more access
than the page-table hierarchy. This situation can occur only if the guest operating
system has modified a page-table entry to reduce access (for example: by
marking it not-present). Because the older, more permissive translation may
have been cached in the TLB, the processor is architecturally permitted to use the
older translation and allow more access. Thus, the VMM may (through the active
page-table hierarchy) also allow greater access. For the new, less permissive