Intel 64 and IA-32 Architectures Software Developers Manual Volume 3B, System Programming Guide Part 2

28-2 Vol. 3
HANDLING BOUNDARY CONDITIONS IN A VIRTUAL MACHINE MONITOR
• Control of Other Events. There is a pin-based VM-execution control that
controls system behavior (exit or no-exit) for NMI events. Most VMM usages will
need handling of NMI external events in the VMM and hence will specify host
control of these events.
Some processors also support a pin-based VM-execution control called “virtual
NMIs.” When this control is set, NMIs cause VM exits, but the processor tracks
guest readiness for virtual NMIs. This control interacts with the “NMI-window
exiting” VM-execution control (see below).
INIT and SIPI events always cause VM exits.
• Acknowledge-Interrupt-On-Exit. The acknowledge-interrupt-on-exit bit in
the VM-exit control field in the controlling-VMCS controls processor behavior for
external interrupt acknowledgement. If the control bit is set, the processor
acknowledges the interrupt controller to acquire the interrupt vector upon VM
exit, and stores the vector in the VM-exit interruption-information field. If the
control bit is clear, the external interrupt is not acknowledged during VM exit.
Since RFLAGS.IF is automatically cleared on VM exits due to external interrupts,
VMM re-enabling of interrupts (setting RFLAGS.IF = 1) initiates the external
interrupt acknowledgement and vectoring of the external interrupt through the
monitor/host IDT.
• Event Masking Support. VMX captures the masking conditions of specific
events while in VMX non-root operation through the interruptibility-state field in
the guest-state area of the VMCS.
This feature allows proper virtualization of various interrupt blocking states, such
as: (a) blocking of external interrupts for the instruction following STI; (b)
blocking of interrupts for the instruction following a MOV-SS or POP-SS
instruction; (c) SMI blocking of subsequent SMIs until the next execution of RSM;
and (d) NMI/SMI blocking of NMIs until the next execution of IRET or RSM.
INIT and SIPI events are treated specially. INIT assertions are always blocked in
VMX root operation and while in SMM, and unblocked otherwise. SIPI events are
always blocked in VMX root operation.
The interruptibility state is loaded from the VMCS guest-state area on every
VM entry and saved into the VMCS on every VM exit.
• Event injection. VMX operation allows injecting interruptions to a guest virtual
machine through the use of VM-entry interrupt-information field in VMCS.
Injectable interruptions include external interrupts, NMI, processor exceptions,
software generated interrupts, and software traps. If the interrupt-information
field indicates a valid interrupt, exception or trap event upon the next VM entry;
the processor will use the information in the field to vector a virtual interruption
through the guest IDT after all guest state and MSRs are loaded. Delivery
through the guest IDT emulates vectoring in non-VMX operation by doing the
normal privilege checks and pushing appropriate entries to the guest stack
(entries may include RFLAGS, EIP and exception error code). A VMM with host
control of NMI and external interrupts can use the event-injection facility to
forward virtual interruptions to various guest virtual machines.