Intel 64 and IA-32 Architectures Software Developers Manual Volume 3B, System Programming Guide Part 2

28-10 Vol. 3
HANDLING BOUNDARY CONDITIONS IN A VIRTUAL MACHINE MONITOR
Once the physical interrupt source is masked and the platform EOI generated, the
VMM can map the host vector to its corresponding guest vector to inject the virtual
interrupt into the assigned VM. The guest software does EOI write sequences to its
virtual interrupt controller after completing interrupt processing. For level triggered
interrupts, these EOI writes to the virtual interrupt controller may be trapped by the
VMM which may in turn unmask the previously masked interrupt source.
28.3.3.4 Generation of Virtual Interrupt Events by VMM
The following provides some of the general steps that need to be taken by VMM
designs when generating virtual interrupts:
1. Check virtual processor interruptibility state. The virtual processor interruptibility
state is reflected in the guest RFLAGS.IF flag and the processor interruptibility-
state saved in the guest state area of the controlling-VMCS. If RFLAGS.IF is set
and the interruptibility state indicates readiness to take external interrupts (STI-
masking and MOV-SS/POP-SS-masking bits are clear), the guest virtual
processor is ready to take external interrupts. If the VMM design supports non-
active guest sleep states, the VMM needs to make sure the current guest sleep
state allows injection of external interrupt events.
2. If the guest virtual processor state is currently not interruptible, a VMM may
utilize the “interrupt-window exiting” VM-execution to notify the VM (through a
VM exit) when the virtual processor state changes to interruptible state.
3. Check the virtual interrupt controller state. If the guest VM exposes a virtual local
APIC, the current value of its processor priority register specifies if guest
software allows dispensing an external virtual interrupt with a specific priority to
the virtual processor. If the virtual interrupt is routed through the local vector
table (LVT) entry of the local APIC, the mask bits in the corresponding LVT entry
specifies if the interrupt is currently masked. Similarly, the virtual interrupt
controller’s current mask (IO-APIC or PIC) and priority settings reflect guest
state to accept specific external interrupts. The VMM needs to check both the
virtual processor and interrupt controller states to verify its guest interruptibility
state. If the guest is currently interruptible, the VMM can inject the virtual
interrupt. If the current guest state does not allow injecting a virtual interrupt,
the interrupt needs to be queued by the VMM until it can be delivered.
4. Prioritize the use of VM-entry event injection. A VMM may use VM-entry event
injection to deliver various virtual events (such as external interrupts,
exceptions, traps, and so forth). VMM designs may prioritize use of virtual-
interrupt injection between these event types. Since each VM entry allows
injection of one event, depending on the VMM event priority policies, the VMM
may need to queue the external virtual interrupt if a higher priority event is to be
delivered on the next VM entry. Since the VMM has masked this particular
interrupt source (if it was level triggered) and done EOI to the platform interrupt
controller, other platform interrupts can be serviced while this virtual interrupt
event is queued for later delivery to the VM.