Intel 64 and IA-32 Architectures Software Developers Manual Volume 3B, System Programming Guide Part 2

Vol. 3 A-71
PERFORMANCE-MONITORING EVENTS
3BH C0HTHERMAL_TRIPNumber of
thermal trips
This event counts the number of thermal
trips. A thermal trip occurs whenever the
processor temperature exceeds the
thermal trip threshold temperature.
Following a thermal trip, the processor
automatically reduces frequency and
voltage. The processor checks the
temperature every millisecond and returns
to normal when the temperature falls
below the thermal trip threshold
temperature.
3CH 00HCPU_CLK_
UNHALTED.
CORE_P
Core cycles
when core is
not halted
This event counts the number of core
cycles while the core is not in a halt state.
The core enters the halt state when it is
running the HLT instruction. This event is a
component in many key event ratios.
The core frequency may change due to
transitions associated with Enhanced Intel
SpeedStep Technology or TM2. For this
reason, this event may have a changing
ratio in regard to time.
When the core frequency is constant, this
event can give approximate elapsed time
while the core not in halt state.
This is an architectural performance event.
3CH 01HCPU_CLK_
UNHALTED.BUS
Bus cycles
when core is
not halted
This event counts the number of bus
cycles while the core is not in the halt
state. This event can give a measurement
of the elapsed time while the core was not
in the halt state. The core enters the halt
state when it is running the HLT
instruction.
The event also has a constant ratio with
CPU_CLK_UNHALTED.REF event, which is
the maximum bus to processor frequency
ratio.
Non-halted bus cycles are a component in
many key event ratios.
Table A-6. Non-Architectural Performance Events
in Processors Based on Intel Core Microarchitecture (Contd.)
Event
Num
Umask
Value Event Name Definition
Description and
Comment