Intel 64 and IA-32 Architectures Software Developers Manual Volume 3B, System Programming Guide Part 2

Table Of Contents
B-114 Vol. 3
MODEL-SPECIFIC REGISTERS (MSRS)
30AH 778 MSR_FLAME_
COUNTER2
0, 1, 2,
3, 4, 6
Shared See Section 18.18.2,
“Performance Counters.
30BH 779 MSR_FLAME_
COUNTER3
0, 1, 2,
3, 4, 6
Shared See Section 18.18.2,
“Performance Counters.
3OCH 780 MSR_IQ_COUNTER0 0, 1, 2,
3, 4, 6
Shared See Section 18.18.2,
“Performance Counters.
3ODH 781 MSR_IQ_COUNTER1 0, 1, 2,
3, 4, 6
Shared See Section 18.18.2,
“Performance Counters.
3OEH 782 MSR_IQ_COUNTER2 0, 1, 2,
3, 4, 6
Shared See Section 18.18.2,
“Performance Counters.
3OFH 783 MSR_IQ_COUNTER3 0, 1, 2,
3, 4, 6
Shared See Section 18.18.2,
“Performance Counters.
310H 784 MSR_IQ_COUNTER4 0, 1, 2,
3, 4, 6
Shared See Section 18.18.2,
“Performance Counters.
311H 785 MSR_IQ_COUNTER5 0, 1, 2,
3, 4, 6
Shared See Section 18.18.2,
“Performance Counters.
360H 864 MSR_BPU_CCCR0 0, 1, 2,
3, 4, 6
Shared See Section 18.18.3, “CCCR MSRs.
361H 865 MSR_BPU_CCCR1 0, 1, 2,
3, 4, 6
Shared See Section 18.18.3, “CCCR MSRs.
362H 866 MSR_BPU_CCCR2 0, 1, 2,
3, 4, 6
Shared See Section 18.18.3, “CCCR MSRs.
363H 867 MSR_BPU_CCCR3 0, 1, 2,
3, 4, 6
Shared See Section 18.18.3, “CCCR MSRs.
364H 868 MSR_MS_CCCR0 0, 1, 2,
3, 4, 6
Shared See Section 18.18.3, “CCCR MSRs.
365H 869 MSR_MS_CCCR1 0, 1, 2,
3, 4, 6
Shared See Section 18.18.3, “CCCR MSRs.
366H 870 MSR_MS_CCCR2 0, 1, 2,
3, 4, 6
Shared See Section 18.18.3, “CCCR MSRs.
367H 871 MSR_MS_CCCR3 0, 1, 2,
3, 4, 6
Shared See Section 18.18.3, “CCCR MSRs.
368H 872 MSR_FLAME_CCCR0 0, 1, 2,
3, 4, 6
Shared See Section 18.18.3, “CCCR MSRs.
Table B-6. MSRs in the Pentium 4 and Intel Xeon Processors (Contd.)
Register
Address
Register Name
Fields and Flags
Model
Avail-
ability
Shared/
Unique
1
Bit Description
Hex Dec