Intel 64 and IA-32 Architectures Software Developers Manual Volume 3B, System Programming Guide Part 2

Table Of Contents
B-154 Vol. 3
MODEL-SPECIFIC REGISTERS (MSRS)
406H 1030 IA32_MC1_ADDR See Section 14.3.2.3, “IA32_MCi_ADDR MSRs.
The IA32_MC1_ADDR register is either not
implemented or contains no address if the ADDRV
flag in the IA32_MC1_STATUS register is clear.
When not implemented in the processor, all reads
and writes to this MSR will cause a general-
protection exception.
408H 1032 IA32_MC2_CTL See Section 14.3.2.1, “IA32_MCi_CTL MSRs.
409H 1033 IA32_MC2_STATUS See Chapter 14.3.2.2, “IA32_MCi_STATUS MSRS.
40AH 1034 IA32_MC2_ADDR See Section 14.3.2.3, “IA32_MCi_ADDR MSRs.
The IA32_MC2_ADDR register is either not
implemented or contains no address if the ADDRV
flag in the IA32_MC2_STATUS register is clear.
When not implemented in the processor, all reads
and writes to this MSR will cause a general-
protection exception.
40CH 1036 MSR_MC4_CTL See Section 14.3.2.1, “IA32_MCi_CTL MSRs.
40DH 1037 MSR_MC4_STATUS See Section 14.3.2.2, “IA32_MCi_STATUS MSRS.
40EH 1038 MSR_MC4_ADDR See Section 14.3.2.3, “IA32_MCi_ADDR MSRs.
The MSR_MC4_ADDR register is either not
implemented or contains no address if the ADDRV
flag in the MSR_MC4_STATUS register is clear.
When not implemented in the processor, all reads
and writes to this MSR will cause a general-
protection exception.
410H 1040 MSR_MC3_CTL See Section 14.3.2.1, “IA32_MCi_CTL MSRs.
411H 1041 MSR_MC3_STATUS See Section 14.3.2.2, “IA32_MCi_STATUS MSRS.
412H 1042 MSR_MC3_ADDR See Section 14.3.2.3, “IA32_MCi_ADDR MSRs.
The MSR_MC3_ADDR register is either not
implemented or contains no address if the ADDRV
flag in the MSR_MC3_STATUS register is clear.
When not implemented in the processor, all reads
and writes to this MSR will cause a general-
protection exception.
Table B-10. MSRs in Pentium M Processors (Contd.)
Register
Address
Register Name Bit Description
Hex Dec