Intel 64 and IA-32 Architectures Software Developers Manual Volume 3B, System Programming Guide Part 2

Vol. 3 18-95
DEBUGGING AND PERFORMANCE MONITORING
• Enable flag, bit 12 — When set, enables counting; when clear, the counter is
disabled. This flag is cleared on reset.
• ESCR select field, bits 13 through 15 — Identifies the ESCR to be used to
select events to be counted with the counter associated with the CCCR.
• Compare flag, bit 18 — When set, enables filtering of the event count; when
clear, disables filtering. The filtering method is selected with the threshold,
complement, and edge flags.
• Complement flag, bit 19 — Selects how the incoming event count is compared
with the threshold value. When set, event counts that are less than or equal to
the threshold value result in a single count being delivered to the performance
counter; when clear, counts greater than the threshold value result in a count
being delivered to the performance counter (see Section 18.18.6.2, “Filtering
Events”). The complement flag is not active unless the compare flag is set.
• Threshold field, bits 20 through 23 — Selects the threshold value to be used
for comparisons. The processor examines this field only when the compare flag is
set, and uses the complement flag setting to determine the type of threshold
comparison to be made. The useful range of values that can be entered in this
field depend on the type of event being counted (see Section 18.18.6.2, “Filtering
Events”).
• Edge flag, bit 24 — When set, enables rising edge (false-to-true) edge
detection of the threshold comparison output for filtering event counts; when
clear, rising edge detection is disabled. This flag is active only when the compare
flag is set.