Intel Pentium 4 Processor Extreme Edition on 0.13 Micron Process in the 775-Land Package Datasheet

Datasheet 77
Features
A transition to the HALT/Grant Snoop state occurs when the processor detects a snoop on the FSB
(see Section 6.2.4). A transition to the Sleep state (see Section 6.2.5) occurs with the assertion of
the SLP# signal.
While in the Stop-Grant State, SMI#, INIT#, BINIT# and LINT[1:0] are latched by the processor,
and only serviced when the processor returns to the Normal State. Only one occurrence of each
event will be recognized upon return to the Normal state.
While in Stop-Grant state, the processor processes snoops on the FSB and latches interrupts
delivered on the FSB.
The PBE# signal can be driven when the processor is in Stop-Grant state. PBE# will be asserted if
there is any pending interrupt latched within the processor. Pending interrupts that are blocked by
the EFLAGS.IF bit being clear still cause assertion of PBE#. Assertion of PBE# indicates to
system logic that it should return the processor to the Normal state.
6.2.4 HALT/Grant Snoop State—State 4
The processor responds to snoop or interrupt transactions on the FSB while in Stop-Grant state or
in AutoHALT Power Down state. During a snoop or interrupt transaction, the processor enters the
HALT/Grant Snoop state. The processor stays in this state until the snoop on the FSB has been
serviced (whether by the processor or another agent on the FSB) or the interrupt has been latched.
After the snoop is serviced or the interrupt is latched, the processor returns to the Stop-Grant state
or AutoHALT Power Down state, as appropriate.
6.2.5 Sleep State—State 5
The Sleep state is a very low power state in which the processor maintains its context, maintains
the phase-locked loop (PLL), and has stopped all internal clocks. The Sleep state can only be
entered from Stop-Grant state. Once in the Stop-Grant state, the processor enters the Sleep state
upon the assertion of the SLP# signal. The SLP# signal should only be asserted when the processor
is in the Stop Grant state. SLP# assertions while the processor is not in the Stop Grant state is out of
specification and may result in erroneous processor operation.
Snoop events that occur while in Sleep State or during a transition into or out of Sleep state cause
unpredictable behavior.
In the Sleep state, the processor is incapable of responding to snoop transactions or latching
interrupt signals. No transitions or assertions of signals (with the exception of SLP# or RESET#)
are allowed on the FSB while the processor is in Sleep state. Any transition on an input signal
before the processor has returned to Stop-Grant state will result in unpredictable behavior.
If RESET# is driven active while the processor is in the Sleep state, and held active as specified in
the RESET# signal specification, then the processor resets itself, ignoring the transition through
Stop-Grant State. If RESET# is driven active while the processor is in the Sleep State, the SLP#
and STPCLK# signals should be de-asserted immediately after RESET# is asserted to ensure the
processor correctly executes the reset sequence.
Once in the Sleep state, the SLP# signal must be de-asserted if another asynchronous FSB event
needs to occur. The SLP# signal has a minimum assertion of one BCLK period.
When the processor is in the Sleep state, it does not respond to interrupts or snoop transactions.
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