Intel Pentium 4 Processor on 90 nm Process

Datasheet 25
Electrical Specifications
Table 11. V
CC
Static and Transient Tolerance for Loadline B
Icc (A)
Voltage Deviation from VID Setting (V)
1,2,3
NOTES:
1. The loadline specification includes both static and transient limits except for overshoot allowed
as shown in Section 2.11.
2. This table is intended to aid in reading discrete points on Figure 3.
3. The loadlines specify voltage limits at the die measured at the VCC_SENSE and VSS_SENSE
pins. Voltage regulation feedback for voltage regulator circuits must be taken from processor
VCC and VSS pins. Refer to the Voltage Regulator-Down (VRD) 10.0 Design Guide for socket
loadline guidelines and VR implementation details for 478_VR_CONFIG_B.
Maximum Voltage Typical Voltage Minimum Voltage
0 0.000 -0.025 -0.050
5 -0.007 -0.033 -0.059
10 -0.015 -0.041 -0.068
15 -0.022 -0.049 -0.077
20 -0.029 -0.058 -0.086
25 -0.036 -0.066 -0.095
30 -0.044 -0.074 -0.104
35 -0.051 -0.082 -0.113
40 -0.058 -0.090 -0.122
45 -0.065 -0.098 -0.131
50 -0.073 -0.106 -0.140
55 -0.080 -0.114 -0.149
60 -0.087 -0.123 -0.158
65 -0.094 -0.131 -0.167
70 -0.102 -0.139 -0.176
75 -0.109 -0.147 -0.185
78 -0.113 -0.152 -0.190