Intel Pentium 4 Processor CK00 Clock Synthesizer/Driver Design Guidelines

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CK00 Clock Synthesizer/Driver Design Guidelines

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Table 6.6 Select Functions –

CKx_RGR

SEL100/133 SELA SELB Function

0 0 0 Active 100MHz

0 0 1 (Reserved)

0 1 0 (Reserved)

0 1 1 HI-Z all outputs

1 0 0 Active 133MHz

1 0 1 (Reserved)

1 1 0 (Reserved)

111Test Mode

SEL

100/133

SELA SELB Host MRef 3V66 3V33

PCI

48MHz REF

Notes:

0 0 0 100MHz 50MHz 66MHz 33MHz 48MHz 14.318

MHz

0 0 1 N/A N/A N/A N/A N/A N/A

0 1 0 N/A N/A N/A N/A N/A N/A

0 1 1 HI-Z HI-Z HI-Z HI-Z HI-Z HI-Z

1 0 0 133MHz 66MHz 66MHz 33MHz 48MHz 14.318

MHz

1 0 1 N/A N/A N/A N/A N/A N/A

1 1 0 N/A N/A N/A N/A N/A N/A

1 1 1 TCLK/2 TCLK/4 TCLK/4 TCLK/8 TCLK/2 TCLK