Intel Pentium 4 Processor In the 423-pin Package Thermal Design Guidelines

Pentium® 4 processor in the 423-pin package Thermal Design Guidelines
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Figure 11. Internal Clock Modulation
8.3 Operation and Configuration
The Thermal Monitor Feature is always enabled. But, to maintain compatibility with previous generations of
processors having no integrated thermal logic, the clock modulation portion of Thermal Monitor is disabled by
default. During the boot process, the BIOS must enable the thermal control circuit; or a software driver may do this
after the operating system has booted. Refer to the IA32 Intel Architecture Software Developer Manuals for
programming details.
The thermal control circuit feature can be configured and monitored in a number of ways. OEMs are expected to
enable the thermal control circuit while using various registers and outputs to monitor the processor thermal status.
The thermal control circuit is enabled by BIOS setting a bit in an MSR (model specific register). Enabling the
thermal control circuit allows the processor to maintain a safe operating temperature without the need for special
software drivers or interrupt handling routines. When the thermal control circuit has been enabled, it will be active
about 50 ns after detecting a high temperature (i.e. ~50 ns after PROCHOT# is asserted). The thermal control circuit
and PROCHOT# go inactive once the temperature has been brought back down below the thermal trip point,
although a small hysteresis (~1 °C) has been included to prevent multiple PROCHOT# transitions around the trip
point. External hardware can monitor PROCHOT# and generate an interrupt whenever there is a transition from
active-to-inactive or inactive-to-active. PROCHOT# can also be configured to generate an internal interrupt which
would initiate an OEM supplied interrupt service routine. Regardless of the configuration selected, PROCHOT# will
always indicate the thermal status of the processor.
For testing purposes, the thermal control circuit may also be activated by setting bits in the ACPI-compliant MSRs.
The MSRs may be set based on a particular system event (such as an interrupt generated after a system event), or
may be set at any time through OS or custom driver control thus forcing the thermal control circuit on. Activating
the thermal control circuit may be useful for cooling solution investigations or for performance implication studies.
When using the MSRs to activate the Thermal Monitor feature, the duty cycle is configurable in steps of 12.5% from
12.5 to 87.5%. For any duty cycle, the maximum time the clocks will be disabled is ~2 µs. To achieve different duty
cycles, the interval between stopping the clocks is automatically adjusted to achieve the desired ratio. For example,
if a duty cycle of ¼ (25%) were to be selected, the clock off time would be 2 µs, while the clock on time would be
reduced to approximately 0.66 µs [on time (0.66 µs) ÷ total cycle time (2 + 0.66) µs = ¼ duty cycle]. Similarly, for a
duty cycle of 7/8 (87.5%), the clock on time would be extended to 14 µs [14 ÷ (14 + 2.) = 7/8 duty cycle].
In a high temperature situation, if the automatic thermal control circuit and ACPI-compliant MSRs are used
simultaneously, the 50% duty cycle will take precedence.
PROCHOT#
Resultant
internal clock
Normal clock
Internal clock
Duty cycle
control