Intel Pentium 4 Processor in the 478-pin Package / Intel 850 Chipset Platform Family Design Guide

Layout Review Checklist
R
286 Intel
®
Pentium
®
4 Processor / Intel
®
850 Chipset Family Platform Design Guide
16.6 IDE Interface
√ Recommendations Reason/Impact
• 5 mil wide and 7 mil spaces • Refer to Section 9.1.
• Max trace length is 8 inches long • Refer to Section 9.1.
• Shortest trace length must be 0.5 inches
shorter than the longest trace length.
• Refer to Section 9.1.
16.7 CNR
√ Recommendations Reason/Impact
• 4.5 inches min to 8.5 inches max trace
length for LAN* Connect signals
• Refer to Section 9.2.
• 60 Ω ±15% • Refer to Section 9.2.
• Maximum mismatch between length of clock
trace and length of any data trace is
0.5 inches
• Refer to Section 9.2.
16.8 Intel
®
AC’97
√ Recommendations Reason/Impact
• Z
O
AC97 = 60 Ω + 15% • Refer to Section 9.3.
• 5 mil trace width, 5 mil spacing between
traces
• Refer to Section 9.3.
• Max Trace Length
ICH2/Codec/CNR = 12 inches
• Refer to Section 9.3.