Intel Pentium 4 Processor in the 478-PinPackage at 1.40 GHz, 1.50 GHz, 1.60 GHz, 1.70 GHz, 1.80 GHz, 1.90 GHz, and 2GHz

Electrical Specifications
14 Datasheet
2.4.1 Phase Lock Loop (PLL) Power and Filter
V
CCA
and V
CCIOPLL
are power sources required by the PLL clock generators on the
Pentium 4 processor in the 478-pin package silicon. Since these PLLs are analog in
nature, they require quiet power supplies for minimum jitter. Jitter is detrimental to the
system: it degrades external I/O timings as well as internal core timings (i.e., maximum
frequency). To prevent this degradation, these supplies must be low pass filtered from
V
CC
. A typical filter topology is shown in Figure 1.
The AC low-pass requirements, with input at V
CC
and output measured across the
capacitor (C
A
or C
IO
in Figure 1), is as follows:
• < 0.2 dB gain in pass band
• < 0.5 dB attenuation in pass band < 1 Hz (see DC drop in next set of requirements)
• >34dBattenuationfrom1MHzto66MHz
• > 28 dB attenuation from 66 MHz to core frequency
The filter requirements are illustrated in Figure 2. For recommendations on implementing
the filter refer to Table 1 for the appropriate Platform Design Guide.
Figure 1. Typical V
CCIOPLL
,V
CCA
and V
SSA
Power Distribution
VCC
R
VCCA
VSSA
VCCIOPLL
R
L
L
Processor
Core
PLL
C A
C IO