Intel Pentium 4 Processor on 90 nm Process
Table Of Contents

Errata
R
58 Intel
®
Pentium
®
4 Processor on 90 nm Process Specification Update
R81. An REP MOVS or an REP STOS Instruction with RCX >= 2^32 May Fail to
Execute to Completion or May Write to Incorrect Memory Locations on
Processors Supporting Intel
®
Extended Memory 64 Technology (Intel
®
EM64T)
Problem: In IA-32e mode using Intel EM64T-enabled processors, an REP MOVS or an REP STOS
instruction executed with the register RCX >= 2^32, may fail to execute to completion or may
write data to incorrect memory locations.
Implication: This erratum may cause an incomplete instruction execution or incorrect data in the memory. Intel
has not observed this erratum with any commercially available software.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Tables of Changes.
R82. An REP LODSB or an REP LODSD or an REP LODSQ Instruction with RCX
>= 2^32 May Cause a System Hang on Processors Supporting Intel
®
Extended Memory 64 Technology (Intel
®
EM64T)
Problem: In IA-32e mode using Intel EM64T-enabled processors, an REP LODSB or an REP LODSD or
an REP LODSQ instruction executed with the register RCX >= 2^32 may fail to complete
execution causing a system hang. Additionally, there may be no #GP fault due to the non-
canonical address in the RSI register.
Implication: This erratum may cause a system hang on Intel EM64T-enabled platforms. Intel has not observed
this erratum with any commercially available software.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Tables of Changes.
R83. A Data Access which Spans Both the Canonical and the Non-Canonical
Address Space May Hang the System
Problem: If a data access causes a page split across the canonical to non-canonical address space the
processor may livelock which in turn would cause a system hang.
Implication: When this erratum occurs, the processor may livelock, resulting in a system hang. Intel has not
observed this erratum with any commercially available software.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.