Intel Pentium 4 Processor VR-Down Design Guidelines
Table Of Contents
- Output Requirements
- Voltage and Current REQUIRED
- Voltage Tolerance REQUIRED
- Load Line Definitions REQUIRED
- Processor Electrical And Thermal Current Support EXPECTED
- No-Load Operation EXPECTED
- Turn-on Response Time PROPOSED
- Processor Power Sequencing REQUIRED
- Overshoot at Turn-On or Turn-Off REQUIRED
- Converter Stability REQUIRED
- Thermal Monitoring PROPOSED
- Input Voltage and Current
- Control Inputs REQUIRED
- Power Good Output (PWRGD) PROPOSED
- Efficiency PROPOSED
- Fault Protection
Intel
®
Pentium
®
4 Processor VR-Down Design Guidelines
14
2 Input Voltage and Current
2.1 Input Voltages REQUIRED
The main power source for the VR is 12V +5%, -8%. This voltage is supplied by a conventional
computer power supply through a cable to the system board. The system board will supply local bulk
bypassing on the 12V rail. Adequate connector current handling capacity must be part of system power
budgeting.
2.2 Load Transient Effects on Input Current EXPECTED
When the VR is providing an output current step to the load from Iout
MIN
to Iout
MAX
or Iout
MAX
to
Iout
MIN
at the slew rate of 350A/us at the processor, the slew rate of the input current to the VR should
not exceed 0.5A/µsec. The system board needs sufficient bulk decoupling to ensure that the supply
voltage on the system board does not go outside of regulation requirements during VR load transients.
3 Control Inputs REQUIRED
3.1 Output Enable—(OUTEN)
The VR should accept an open-collector, open-drain, open-switch-to-ground, low-voltage TTL or low-
voltage CMOS signal to enable the output. The input should have a pull-up resistor between 1 kΩ and
10 kΩ to a maximum voltage of 3.3V. The maximum low-input voltage is 0.8V; the minimum high-
input voltage is 1.7V. When disabled, the VR should not sink or source current. When Output Enable
is pulled low during the shutdown process, the VR should not exceed its previous voltage level
regardless of the VID setting.
3.2 Voltage Identification—(VID [0:4])
The VR must accept five input lines to set the nominal voltage as defined by the table below. Five
processor pins (VID[4:0]) will have either an open-ground combination (Pentium 4 processor in the
478-pin package) or open-drain driver outputs (Pentium 4 processor with 512-KB L2 cache on 0.13
micron process). When all five VID inputs are high (11111), such as when no processor is installed,
the VR should disable its output.
The maximum low-input voltage is 0.8V; the minimum high-input voltage is 1.7V. Each VID input
should have a 1 kΩ ± 10% pull-up resistor to 3.3V ± 5%. Board designers using other values should
check them against data sheets for the VR components and the processor.