Intel Pentium 4 Processor with 512-KB L2 Cache on 0.13 Micron Process Thermal Design Guidelines

Mechanical Requirements

Intel

Pentium

4 Processor Thermal Design Guide 11

2 Mechanical Requirements

2.1.1 Processor Package

The Pentium 4 processor with 512-KB L2 cache on 0.13 micron process is packaged in a Flip-

Chip Pin Grid Array 2 (FC-PGA2) package technology and often referred as the 478-pin package.

Refer to the Intel

Pentium

4 Processor with 512-KB L2 Cache on 0.13 Micron Process

Datasheet for detailed mechanical specifications.

The package includes an integrated heat spreader (IHS). The IHS spreads the non-uniform heat

from the die to the top of the IHS, increasing heat uniformity and reducing the power density due

to the larger surface area. This allows more efficient heat transfer from the package to an attached

cooling device. The IHS is designed to be the interface for mounting a heatsink. Details can be

found in the Intel

Pentium

4 Processor with 512-KB L2 Cache on 0.13 Micron Process

Datasheet.

The processor connects to the motherboard through a 478-pin surface mount, zero insertion force

(ZIF) socket. A description of the socket can be found in the Intel

Pentium

4 Processor 478-Pin

Socket (mPGA478) Design Guidelines.

The processor package has mechanical load limits that are specified in the datasheet. These load

limits should not be exceeded during heatsink installation, removal, mechanical stress testing, or

standard shipping conditions. For example, when a compressive static load is necessary to ensure

thermal performance of the thermal interface material between the heatsink base and the IHS

(see Appendix A for more information regarding bond line management), this compressive static

load should not exceed the compressive static load given in the processor datasheet.

The heatsink mass can also add additional dynamic compressive load to the package during a

mechanical shock event. Amplification factors due to the impact force during shock have to be

taken into account in dynamic load calculations. The total combination of dynamic and static

compressive load should not exceed the processor datasheet compressive dynamic load

specification during a vertical shock. For example, with a 1lbm heatsink, an acceleration of 50 g

during a 11ms shock results approximately in a 100 lbf dynamic load on the processor package. If

a 100 lbf static load is also applied on the heatsink for thermal performance of the thermal

interface material and/or for mechanical reasons, the processor package sees 200 lbf. The

calculation for the thermal solution of interest should be compared to the processor datasheet

specification.

It is not recommended to use any portion of the substrate as a mechanical reference or load-

bearing surface in either static or dynamic compressive load conditions.