Mobile Intel Pentium 4 Processor - M and Intel 845MP/MZ Chipset Platform Design Guide

Mobile Intel

Pentium

4 Processor-M and Intel

845MP/845MZ Chipset Platform

114 Design Guide

Figure 55. Unified Vcc_Suspend Architecture

ICH3-M

SMBus

DEVICES

Vsus

SMBus

Vsus

9.6.1.4. The Unified Vcc_Core Architecture

In this design, all SMBUS devices are powered by the Vcc_Core supply. This architecture allows none

of the devices to operate in STR, but minimizes the load on Vcc_Suspend.

Figure 56. Unified Vcc_Core Architecture

ICH3-M

SMBus

DEVICES

Vsus

SMBus

Vsus

Vcore

NOTES:

1. The SMBus device needs to be back-drive safe while its supply (Vcore) is off and Vcc_Suspend is still

powered.

2. In suspended modes where Vcc_Core is OFF & Vcc_Suspend is on, the Vcc_Core node will be very near

ground. In this case the input leakage of the ICH3-M will be approximately 10 µA.

9.6.1.5. Mixed Architecture

This design allows for SMBus devices to communicate while in STR, yet minimizes Vcc_Suspend

leakage by keeping non-essential devices on the core supply. This is accomplished by the use of a “bus

switch” to isolate the devices powered by the core and suspend supplies.