Mobile Intel Pentium 4 Processor - M and Intel 845MP/MZ Chipset Platform Design Guide

Mobile Intel
®
Pentium
®
4 Processor-M and Intel
®
845MP/845MZ Chipset Platform
158 Design Guide
R
10.3.7. USBCLK Clock Group
The driver is the clock synthesizer USB clock output buffer and the receiver is the USB clock input
buffer at the Intel ICH3-M. Note that this clock is asynchronous to any other clock on the board.
Figure 89. Topology for USB_CLOCK
A
R1
Clock
Driver
ICH2
B
Table 57. USBCLK Routing Guidelines
Parameter Routing Guidelines
Clock Group USBCLK
Topology Point to point
Reference Plane Ground Referenced (Contiguous over entire Length)
Characteristic Trace Impedance (Zo) 50 Ohms ± 15%
Trace Width 5 mils
Trace Spacing -
Spacing to other traces 20 mils
Trace Length – A 0.00” – 0.50”
Trace Length – B 3.00” – 12.00”
Resistor R1 = 33 Ohms ± 1%
Skew Requirements None – USBCLK is asynchronous to any other clock on the board
Maximum via Count per signal 2