Mobile Intel Pentium 4 Processor - M and Intel 845MP/MZ Chipset Platform Design Guide

Mobile Intel
®
Pentium
®
4 Processor-M and Intel
®
845MP/845MZ Chipset Platform
18 Design Guide
R
Convention/
Terminology
Definition
SSO Simultaneous Switching Output (SSO) effects refers to the difference in electrical timing
parameters and degradation in signal quality caused by multiple signal outputs simultaneously
switching voltage levels (e.g., high-to-low) in the opposite direction from a single signal (e.g., low-
to-high) or in the same direction (e.g., high-to-low). These are respectively called odd-mode
switching and even-mode switching. This simultaneous switching of multiple outputs creates
higher current swings that may cause additional propagation delay (or “push-out”), or a decrease
in propagation delay (or “pull-in”). These SSO effects may impact the setup and/or hold times and
are not always taken into account by simulations. System timing budgets should include margin
for SSO effects.
Stub The branch from the bus trunk terminating at the pad of an agent.
Trunk The main connection, excluding interconnect branches, from one end agent pad to the other end
agent pad.
Undershoot Minimum voltage observed for a signal that falls below V
SS
at the device pad.
Victim A network that receives a coupled crosstalk signal from another network is called the victim
network.
VREF
Guardband
A guardband defined above and below V
REF
to provide a more realistic model accounting for noise
such as V
TT
and V
REF
variation.
1.3. Mobile Intel
®
Pentium
®
4 Processor-M in 478- Pin
Package
The Mobile Intel Pentium 4 Processor-M in the 478-pin package is the next generation, IA-32 processor.
This processor has a number of features that significantly increase its performance from previous IA-32
generation processors. The new Intel NetBurst micro-architecture includes a number of new features
as well as some improvements on existing features.
Intel NetBurst micro-architecture features include hyper-pipelined technology, rapid execution engine,
400-MHz system bus, and execution trace cache. Compared to previous generation processors, the hyper
pipelined technology doubles the pipeline depth in the mobile Pentium 4 Processor-M in the mobile and
allows the processor to reach much higher core frequencies. The rapid execution engine allows the 2
integer ALUs in the processor to run at twice the core frequency, which allows many integer instructions
to execute in 1/2 clock tick. The 400-MHz system bus is a quad-pumped bus running off a 100-MHz
system clock making 3.2 GB/sec data transfer rates possible. The execution trace cache is a level 1
cache that stores approximately 12-k decoded micro-operations, which removes the decoder from the
main execution path, thereby increasing performance.
Improved features within the Intel NetBurst micro-architecture include the advanced dynamic execution,
advanced transfer cache, enhanced floating point and multi-media unit, and Streaming SIMD Extensions
2 (SSE2). The advanced dynamic execution improves speculative execution and branch prediction
internal to the processor. The advanced transfer cache is 512, on-die level 2, cache with an increased
bandwidth over previous micro-architectures. The floating point and multi-media units have been
improved by making the registers 128 bits wide and adding a separate register for data movement.
Finally, SSE2 adds 144 new instructions for double precision floating point, SIMD integer, and memory
management.
The mobile Pentium 4 Processor-M in the 478-pin package supports uniprocessor configurations only.
The mobile Pentium 4 Processor-M includes a Thermal monitor that allows systems to be designed for
anticipated processor thermals as opposed to worst case with no performance degradation expected.