Mobile Intel Pentium 4 Processor - M and Intel 845MP/MZ Chipset Platform Design Guide

Mobile Intel
®
Pentium
®
4 Processor-M and Intel
®
845MP/845MZ Chipset Platform
200 Design Guide
R
ICH3-M – Power Management Interface
Signal System
Pull-up/Pull-
down
Ω
ΩΩ
Ω Series
Damping
Notes 9
99
9
DPRSLPVR ,
PM_SLP_S3#,
PM_SLP__S5#
External pull-up/down not required.
PM_PWRBTN# Has integrated pull-up of 24 kΩ
PM_LANPWROK
, PM_RSMRST#
Timing Requirement: Signal should
be connected to power monitoring
logic, and should go high no sooner
than 10 ms after both Vcc3_3 and
Vcc1_8 have reached their nominal
voltages
Refer to the reference schematics.
PWROK This signal
should be
connected to
power
monitoring
logic, and
should go high
no sooner than
10 ms after both
V
CC
3_3 and
V
CC
1_8 have
reached their
nominal
voltages.
8 K
Ω-
22 K
Ω
RTC well input requires pull-down to
reduce leakage from coin cell
battery in G3. Input must not float in
G3.