Mobile Intel Pentium 4 Processor - M and Intel 845MP/MZ Chipset Platform Design Guide
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Note: Some of the
decoupling Caps may be
extra and shall be removed
after the first build.
ICH3-M (3 of 3)
17 42
845MP/MZ Platformm
Title
Rev
Sheet of
Project:
VCC5REF
VCC5REFSUS
VCC5REFSUS
+V3.3 14,19,21,24,27,29,34,36,40
+V3.3S_ICH 5,15,16,18,19,20,22,34
+V3.3ALWAYS_ICH
22,34
+V_RTC
16,22
+V3.3ALWAYS9,16,18,19,24,25,26,29,32,33,34,39,40+VCC_CORE
3,4,5,7,15,36,37,38
+V3.3_ICHLAN15
+V5S
4,9,19,20,24,31,32,33,35,36,37,40
+V1.8S_ICH
8,15
+V3.3S4,5,6,9,10,14,19,23,28,29,30,31,32,33,36,37,40
+V3.3S_ICH 5,15,16,18,19,20,22,34
+V3.3S_ICH
5,15,16,18,19,20,22,34
+V1.8S 7,8,40
+V1.8_ICHLAN
+V1.8
+V1.8A_ICH+V1.8ALWAYS
40
+V3.3ALWAYS_ICH
5,15,16,18,19,20,22,34
+V5ALWAYS_ICH
4,9,19,20,24,31,32,33,35,36,37,40
Q21
BAT54
13
Q20
BAT54
13
C592
0.1UF
C384
0.1UF
C603
0.1UF
C594
0.1UF
C624
0.1UF
C593
1UF
12
R193
NO_STUFF_0.01_1%
12
C623
0.1UF
R180
1K
+
C318
100uF
VSS
ICH3-M
U46D
ICH3-M
F22
G20
G3
H19
J5
K11
K13
K20
K21
K22
K23
L10
L11
L12
L13
L14
L21
L23
L3
M11
M12
M13
M20
M22
N10
N11
N12
N13
N14
N21
N23
N5
P11
P13
P20
P22
R21
R23
R3
R5
T20
T22
T4
V20
V3
W10
W14
W18
W22
W6
W7
A1
A13
A16
A17
A20
A21
A22
A23
AA12
AA16
AA20
AA22
AA3
AA8
AB8
AC1
AC23
AC8
B10
B13
B14
B15
B18
B19
B20
B22
B8
C14
C15
C16
C17
C18
C19
C20
C21
C22
C3
C6
D13
D16
D17
D20
D21
D22
D9
E14
E15
E18
E19
E20
E5
F19 Y8
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51 VSS103
R258
NO_STUFF_0.01_1%
12
R189
NO_STUFF_0.01_1%
12
R267
NO_STUFF_0.01_1%
12
C598
0.1UF
C340
0.1UF
C596
0.1UF
C599
0.1UF
C602
0.1UF
C316
0.1UF
R194
NO_STUFF_0.01_1%
12
C375
0.1UF
C610
0.1UF
C617
0.1UF
C616
0.1UF
C597
0.1UF
C605
0.1UF
C621
0.1UF
C608
0.1UF
C371
0.1UF
C615
0.1UF
C601
0.1UF
C613
0.1UF
C609
0.1UF
C550
0.1UF
C377
22UF
C333
22UF
C401
22UF
C335
22UF
C604
0.1UF
C619
0.1UF
C330
4.7UF
12
C315
0.1UF
C625
0.1UF
C323
22UF
C618
0.1UF
R181
NO_STUFF_0.01_1%
12
C552
0.1UF
C611
0.1UF
C606
0.1UF
C338
0.1UF
C595
0.1UF
R190
NO_STUFF_0.01_1%
12
C575
0.1UF
R179
1K
C551
0.1UF
ICH3-M
POWER
U46C
ICH3-M
E13
F14
K12
P10
V6
V7
F15
F16
F7
F8
K10
AB6
E6
W8
C13
W5
F9
F10
P14
U18
V22
C23
B23
E7
T21
D6
T1
C2
F6
G6
H6
J6
M10
R6
T6
U6
G18
H18
P12
V15
V16
V17
V18
J18
M14
R18
T18
E11
K6
K18
P6
P18
V10
V14
U19
F17
F18
K14
E10
V8
V9
VCCSUS1.8_0
VCCSUS1.8_1
VCCSUS1.8_2
VCCSUS1.8_3
VCCSUS1.8_4
VCCSUS1.8_5
VCCSUS1.8_6
VCCSUS1.8_7
VCCLAN1.8_0
VCCLAN1.8_1
VCCLAN1.8_2
VCCRTC
VCC5REF1
VCC5REF2
VCC5REFSUS1
VCC5REFSUS2
VCCLAN3.3_0
VCCLAN3.3_1
VCC_CPU_IO_0
VCC_CPU_IO_1
VCC_CPU_IO_2
VCCSUS1.8_8
VCCSUS1.8_9
N/C0
N/C1
N/C2
N/C3
N/C4
VCC3.3_0
VCC3.3_1
VCC3.3_2
VCC3.3_3
VCC3.3_4
VCC3.3_5
VCC3.3_6
VCC3.3_7
VCC3.3_8
VCC3.3_9
VCC3.3_10
VCC3.3_11
VCC3.3_12
VCC3.3_13
VCC3.3_14
VCC1.8_0
VCC1.8_1
VCC1.8_2
VCC1.8_3
VCC1.8_4
VCC1.8_5
VCC1.8_6
VCC1.8_7
VCC1.8_8
VCC1.8_9
VCC1.8_10
VCC1.8_11
VCCSUS3.3_0
VCCSUS3.3_1
VCCSUS3.3_2
VCCSUS3.3_3
VCCSUS3.3_4
VCCSUS3.3_5
C549
0.1UF
C594
1UF
12
C612
1UF
12
C620
0.1UF
C400
0.1UF
C334
10UF
C607
0.1UF
C614
0.1UF
C600
0.1UF
C399
0.1UF
C339
0.1UF
C328
22UF
227
Design Guide