Mobile Intel Pentium 4 Processor - M and Intel 845MP/MZ Chipset Platform Design Guide

Mobile Intel
®
Pentium
®
4 Processor-M and Intel
®
845MP/845MZ Chipset Platform
28 Design Guide
R
3.2.2. GTLREF Layout and Routing Recommendations
There are four AGTL+ GTLREF pins on the processor that are used to set the reference voltage level for
the AGTL+ signals (GTLREF). Because all of these pins are connected inside the processor package,
the GTLREF voltage only needs to be supplied to one of the four pins. The other three pins can be left
unconnected.
Figure 3. GTLREF Routing
49.9 ohms
1%
1
µ
F
VCC_CPU
pin
Tline
100 ohms
1%
220 pF
L1 = 1.5" max
• The processor must have one dedicated voltage divider.
• Decouple the voltage divider with a 1-µF capacitor.
• Keep the voltage divider within 1.5 inches of the GTLREF pin
• Decouple the pin with a high frequency capacitor (such as a 220 pF 603) as close to the pin as
possible
• Keep signal routing at least 10 mils separated from the GTLREF routes. Use a minimum of a 7-mil
trace for routing.
• Do not allow signal lines to use the GTLREF routing as part of their return path (i.e., do not allow
the GTLREF routing to create splits or discontinuities in the reference planes of the system bus
signals).
3.3. Processor Configuration
3.3.1. Mobile Intel Pentium 4 Processor-M in the 478 -Pin Package
Configuration
This section provides more details for routing Mobile Intel Pentium 4 Processor-M based systems. For
proper operation of the processor and the Intel 845MP/845MZ chipset, it is necessary that the system
designer meet the timing and voltage specifications of each component. The following recommendations