Voltage Regulator-Down (VRD) 10.0 Design Guide Addendum

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VRD Design Guide Addendum
2.5 Electrical & Thermal Current Support (EXPECTED)
System boards supporting Pentium 4 processor Extreme Edition supporting Hyper-Threading
Technology should have voltage regulator designs compliant to the FMB parameters defined in
Table 1. This includes full electrical support of 91 A Icc max specifications and robust cooling
solutions to support 80 A thermal design current (VR TDC) indefinitely within the envelope of
system operating conditions
Intel processor’s VR TDC is the sustained (DC equivalent) current parameter that is to be used for
voltage regulator thermal design with supporting Thermal Monitor circuitry (see Section 6.2). At
VR TDC, switching FETs reach maximum temperature heating the motherboard layers and
neighboring components to the pass/fail boundary of thermal limits. Actual component and board
temperatures are established by the envelope of the system’s operating conditions. This includes
voltage regulator layout, processor fan selection, ambient temperature, chassis configuration, etc.
In some instances the CPU VRD will also power other motherboard components such as the
chipset. Under these conditions the VRD will supply current above the FMB limits; VRD
designers must budget this additional current support in final VRD designs while remaining
compliant to electrical and thermal specifications.
2.6 Stability (EXPECTED)
The VRD needs to be unconditionally stable under all specified output voltage ranges and current
transients. The VRD should operate in a no-load condition: i.e., with no processor installed.
Normally the no-processor VID code will be x1111, disabling the VRD (Section 2.10).
2.7 Processor Power Sequencing (REQUIRED)
The VRD must support platforms with defined power-up sequences. Figure 3 is a block diagram
of a power sequencing implementation, and Figure 4 is a timing diagram of the power sequencing
requirements.
Figure 3. Power-on Sequence Block Diagram
V
CC
VR
Output Enable
V
CC
VID VR
Processor
V
CC
VID
VID_PWRGD
V
CC
V
CC
_PWRGD
VID_[5.0]