Voltage Regulator-Down (VRD) 10.0 Design Guide Addendum

R
VRD Design Guide Addendum
Figure 4. Power Sequence Timing Diagram
Vcc_PWRGD
Vcc
VID Invalid VID Valid
VIDPWRGD
VID[5:0]
1ms min
10 ms max
VID Invalid
0 ms min
10 ms max
VccVID
NOTES:
1. VccVID comes up at the application of system power to the VccVID VRD.
2. VccVID VRD generates VID_PWRGD, to latch the processor’s VID outputs and enable Vcc VRD, after
the VccVID supply is valid.
3. Vcc_PWRGD is generated by the Vcc VRD and may be used elsewhere in the system.
2.8 Processor Vcc Overshoot (REQUIRED)
The Pentium processor 4 Extreme Edition supporting Hyper-Threading Technology in socket 478
is capable of tolerating short transient overshoot events above VID on the Vcc supply that will
not impact processor lifespan or reliability. Maximum processor Vcc overshoot, V
OS
, cannot
exceed VID+V
OS
-
MAX.
Overshoot duration, T
OS
, cannot stay above VID for a time more than
T
OS
-
MAX.
Overshoot Specifications:
V
OS
-
MAX
= Maximum overshoot voltage above VID = 50 mV
T
OS
-
MAX
= Maximum overshoot time duration above VID = 25 µs
See Figure 5 for an example of the socket Vcc overshoot specification.
Socket Specification
: Maximum overshoot in socket 478 can to be tuned by applying a current
load release across the socket Vcc and Vss pin field and measured across reference pins identified
in Section 2.2. The platform voltage regulator output filter must be stuffed with a sufficient
number of capacitors to ensure that overshoot says above VID for a time no longer than T
OS
-
MAX
and never exceeds the maximum amplitude of VID+V
OS
-
MAX
+
. Boards in violation must
be redesigned for compliance to avoid processor damage. For the Pentium 4 processor Extreme
Edition supporting Hyper-Threading Technology, the defined current load release is 70 A. See
Figure 5.
Note: + Assumes measurement with a 20 MHz bandwidth limited oscilloscope.