Voltage Regulator-Down (VRD) 10.0 Design Guide Addendum

VRD Design Guide Addendum

PROCHOT# is an open-drain, active-low i/o buffer terminated to the system Vtt (FSB

termination voltage). To maintain reliable signaling between thermal monitor circuit, processor,

and chipset, the bipolar transistor must be selected to operate with a collector bias established

using a single, 130 Ω pull-up resistor. Use of additional termination or pull-up resistors may lead

to signal integrity or logic threshold failures. The values for R1, R2 and R3 in Figure 6 are

included as an example and must be calculated using specific design parameters. The value of R2

is adjusted to calibrate the comparator’s trigger reference voltage (and assertion of PROCHOT#)

against the sensor voltage representing a thermal violation.

6.3 Load Indicator Output (PROPOSED)

The VRD may have an output with a voltage level that varies linearly with the VRD output

current. The PWM controller supplier may specify a voltage-current relationship consistent with

the controller’s current sensing method. Motherboards may route this output to a test point for

system validation.