Voltage Regulator-Down (VRD) 10.1 Design Guide

Introduction
R
10 Design Guide
Table 1-2. Glossary
Term Description
D-VID Dynamic Voltage Identification. A low power mode of operation where the
processor instructs the VRD to operate at a lower voltage.
DAC Digital to Analog Converter.
DCR Direct Current Resistance.
ESL Effective series inductance.
ESR Effective series resistance.
FET Field Effect Transistor.
FR4 A type of printed circuit board (PCB) material.
HVM High volume manufacturing.
I
cc
Processor current.
Itt Bus current associated with the Vtt supply.
LGA775 Socket The surface mount Zero Insertion Force (ZIF) socket designed to accept the
Intel
®
Pentium
®
4 processor in the LGA 775 land grid array package.
Load Line A mathematical model that describes voltage current relationship given system
impedance (R
LL
). The load line equations is V
cc
= VID – I*R
LL
. In this document,
the load line is referenced at the socket unless otherwise stated.
MOSFET Metal Oxide Semiconductor Field Effect Transistor.
OCP Output current protection.
OVP Output voltage protection.
Processor Datasheet A document that defines the processor electrical, mechanical, and thermal
specifications. Also known as the EMTS.
PROCHOT# Under thermal monitoring, the VRD asserts this processor input to indicate an
over-temperature condition has occurred. Assertion of this signal places the
processor in a low power state, thereby cooling the voltage regulator.
RDS FET source to drain channel resistance
RDS-ON FET source to drain channel resistance when bias on.
R
LL
Load line impedance. Defined as the ratio: Voltage droop/current step. This is
the load line slope. In this document, the load line is referenced at the socket
unless otherwise stated.
RSS Root Sum Square. A method of adding statistical variables.
Slope Load line resistance. See R
LL.
In this document, the load line is referenced at the
socket unless otherwise stated.