Voltage Regulator-Down (VRD) 10.1 Design Guide

6 Design Guide

Tables

Table 1-1. Feature Support Terminology............................................................................9

Table 1-2. Glossary...........................................................................................................10

Table 2-1. Socket Load Line Equations............................................................................13

Table 2-2. Vcc Regulator Design Parameters ..................................................................14

Table 2-3. Socket Load Line Window for Design Configuration 775_VR_CONFIG_04A 15

Table 2-4. Socket Load Line Window for Design Configuration 775_VR_CONFIG_04B 16

Table 2-5. Socket Load Line Reference Lands ................................................................18

Table 2-6: Intel

Processor Current Step Values for Transient Socket Load Line Testing20

Table 2-7. Input Parameters for VRD TOB Calculation....................................................23

Table 2-8. D-VID Validation Summary Table.................................................................... 30

Table 2-9. Vcc Overshoot Terminology ............................................................................ 30

Table 2-10. Vcc Overshoot Specifications........................................................................ 30

Table 2-11. Intel Processor Current Release Values for Overshoot Testing ...................31

Table 3-1. Vtt Specifications .............................................................................................37

Table 3-2. Vtt Measurement Lands................................................................................... 39

Table 4-1. Power Sequence Timing Parameters..............................................................42

Table 6-1. Output Enable Specifications ..........................................................................45

Table 6-2. VID Buffer and VID Bus Electrical Parameters ...............................................46

Table 6-3. VRD10 Voltage Identification (VID) Table .......................................................47

Table 9-1. Power Good Specifications .............................................................................53

Table 9-2. VTT_PWRGD Electrical Parameters............................................................... 53

Table 9-3. Thermal Monitor Specifications ....................................................................... 57

Table 10-1. Reference Board Layer Thickness ................................................................ 60

Table 11-1. Parameter Values for the Schematic of Figure 11-4 .....................................69

Table 11-2. Recommended Parameter Values for the Capacitors Models in Figure 11-671

Table 11-3. Electrical Parameters for the Schematic of Figure 11-7................................72

Table 11-4. I_PWL Current Parameters for Figure 11-7 and Figure 11-8........................ 73