Voltage Regulator-Down (VRD) 10.1 Design Guide

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Appendix: LGA775 Version 1 Pinmap

R

Design Guide

77

Land Name Land #

Signal Buffer

Type Direction

D30# F15 Source Synch Input/Output

D31# G15 Source Synch Input/Output

D32# G16 Source Synch Input/Output

D33# E15 Source Synch Input/Output

D34# E16 Source Synch Input/Output

D35# G18 Source Synch Input/Output

D36# G17 Source Synch Input/Output

D37# F17 Source Synch Input/Output

D38# F18 Source Synch Input/Output

D39# E18 Source Synch Input/Output

D4# A5 Source Synch Input/Output

D40# E19 Source Synch Input/Output

D41# F20 Source Synch Input/Output

D42# E21 Source Synch Input/Output

D43# F21 Source Synch Input/Output

D44# G21 Source Synch Input/Output

D45# E22 Source Synch Input/Output

D46# D22 Source Synch Input/Output

D47# G22 Source Synch Input/Output

D48# D20 Source Synch Input/Output

D49# D17 Source Synch Input/Output

D5# B6 Source Synch Input/Output

D50# A14 Source Synch Input/Output

D51# C15 Source Synch Input/Output

D52# C14 Source Synch Input/Output

D53# B15 Source Synch Input/Output

D54# C18 Source Synch Input/Output

D55# B16 Source Synch Input/Output

D56# A17 Source Synch Input/Output

D57# B18 Source Synch Input/Output

D58# C21 Source Synch Input/Output

D59# B21 Source Synch Input/Output

D6# B7 Source Synch Input/Output

D60# B19 Source Synch Input/Output

D61# A19 Source Synch Input/Output

D62# A22 Source Synch Input/Output

D63# B22 Source Synch Input/Output

D7# A7 Source Synch Input/Output

D8# A10 Source Synch Input/Output

D9# A11 Source Synch Input/Output

DBI0# A8 Source Synch Input/Output

DBI1# G11 Source Synch Input/Output

DBI2# D19 Source Synch Input/Output

DBI3# C20 Source Synch Input/Output

DBR# AC2 Power/Other Output

DBSY# B2 Common Clock Input/Output