S2600GZ and S2600GL

Intel® Server Board S2600GZ/GL TPS Platform Management Functional Overview
 CPU/memory register data – useful for diagnosing the cause of the following system errors: CATERR,
ERR[2], SMI timeout, PERR, and SERR. The debug data is saved and timestamped for the last 3
occurrences of the error conditions.
o PCI error registers
o MSR registers
o MCH registers
 BMC configuration data
o BMC FW debug log (that is, SysLog) – Captures FW debug messages.
o Non-volatile storage of captured data. Some of the captured data will be stored persistently in
the BMC’s non-volatile flash memory and preserved across AC power cycles. Due to size
limitations of the BMC’s flash memory, it is not feasible to store all of the data persistently.
 SMBIOS table data. The entire SMBIOS table is captured from the last boot.
 PCI configuration data for on-board devices and add-in cards. The first 256 bytes of PCI configuration
data is captured for each device for each boot.
 System memory map. The system memory map is provided by BIOS on the current boot. This includes
the EFI memory map and the Legacy (E820) memory map depending on the current boot.
 Power supplies debug capability.
o Capture of power supply “black box” data and power supply asset information. Power supply
vendors are adding the capability to store debug data within the power supply itself. The
platform debug feature provides a means to capture this data for each installed power supply.
The data can be analyzed by Intel for failure analysis and possibly provided to the power supply
vendor as well. The BMC gets this data from the power supplies from PMBus* manufacturer-
specific commands.
o Storage of system identification in power supply. The BMC copies board and system serial
numbers and part numbers into the power supply whenever a new power supply is installed in
the system or when the system is first powered on. This information is included as part of the
power supply black box data for each installed power supply.
 Accessibility from IPMI interfaces. The platform debug file can be accessed from an external IPMI
interface (KCS or LAN).
 POST code sequence for the two most recent boots. This is a best-effort data collection by the BMC as
the BMC real-time response cannot guarantee that all POST codes are captured.
 Support for multiple debug files. The platform debug feature provides the ability to save data to 2
separate files that are encrypted with different passwords.
o File #1 is strictly for viewing by Intel engineering and may contain BMC log messages (that is,
syslog) and other debug data that Intel FW developers deem useful in addition to the data
specified in this document.
o File #2 can be viewed by Intel partners who have signed an NDA with Intel and its contents are
restricted to specific data items specified in this with the exception of the BMC syslog messages
and power supply “black box” data.
6.10.15.1
Output Data Format
The diagnostic feature shall output a password-protected compressed HTML file containing specific BMC and
system information. This file is not intended for end-customer usage, this file is for customer support and
engineering only.
6.10.15.2
Output Data Availability
The diagnostic data shall be available on-demand from the embedded web server, KCS, or IPMI over LAN
commands.
6.10.15.3
Output Data Categories
The following tables list the data to be provided in the diagnostic output. For items in Table 25, this data is
collected on detection of CATERR, ERR2, PERR, SERR, and SMI timeout. The data in Table 26 is
accumulated for the three most recent overall errors.
Revision 2.4
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