User Guide

Intel® Integrated BMC Web Console Options Intel® BMC And RMM4 User Guide
74 Intel order number H54847-001 Revision 2.8
• CPU/memory register data useful for diagnosing the cause of the following system
errors: CATERR, ERR[2], SMI timeout, PERR, and SERR – The debug data is saved and
timestamped for the last three occurrences of the error conditions.
o PCI error registers
o MSR registers
o Integrated Memory Controller (iMC) and Integrated I/O (IIO) module registers
• BMC configuration data
• BMC FW debug log (SysLog) – Captures FW debug messages.
• SMBIOS table data – The entire SMBIOS table is captured from the last boot.
• System memory map – The system memory map is provided by BIOS on the current
boot. This includes the EFI memory map and the Legacy (E820) memory map
depending on the current boot.
• Capture of power supply data and power supply asset information – Power supply
vendors are adding the capability to store debug data within the power supply itself.
The platform debug feature provides a means to capture this data for each installed
power supply. The data can be analyzed by Intel for failure analysis and possibly
provided to the power supply vendor as well. The BMC gets this data from the power
supplies by using PMBus* manufacturer-specific commands.
• POST code sequence for the two most recent boots – This is a best-effort data
collection by the BMC as the BMC real-time response cannot guarantee that all POST
codes are captured.
• Support for multiple debug files – The platform debug feature provides the ability to
save data to two separate files that are encrypted with different passwords.
o System Debug Log file can be viewed by Intel engineers and Intel partners.
o System and BMC Debug Log file is strictly for viewing by Intel engineers and
may contain additional BMC log messages and other debug data that Intel
firmware developers deem useful in addition to the data specified above.
7.1.3.3 System Debug Log Page on Intel
®
Server Boards and Systems Based on Intel
®
Server Boards and Systems Based on Intel
®
Xeon
®
Processor E5-2600 V3 ---
S2600WT, S2600KP, S2600TP and S2600CW
The System Debug Log page can be used to collect system debug information on Intel
®
Server
Boards and Systems Based on Intel
®
Xeon
®
Processor E5-2600 V3 --- S2600WT, S2600KP,
S2600TP and S2600CW. See Figure 67 for details.
Click the Generate Log button. It may take some time for the debug information to be
collected.
After the debug log dump is finished, you can click the debug log filename to save the results
as a .zip file on your client system. The file can then be sent to your system manufacturer or an
Intel support engineer for analysis.