Technical product specification

Intel
®
Server Board S2600CP and Server System P4000CP TPS Intel® Server Board S2600CP Functional Architecture
Revision 1.8
Intel order number G26942-005
37
 2 DPC QR Low Voltage RDIMMs are not supported.
 In order to install 3 QR LRDIMMs on the same channel, they must be operated with
Rank Multiplication as RM = 2.
 RAS Modes Lockstep, Rank Sparing, and Mirroring are mutually exclusive in this BIOS.
Only one operating mode may be selected, and it will be applied to the entire system.
 If a RAS Mode has been configured, and the memory population will not support it
during boot, the system will fall back to Independent Channel Mode and log and display
errors
 Rank Sparing Mode is only possible when all channels that are populated with memory
meet the requirement of having at least 2 SR or DR DIMM installed, or at least one QR
DIMM installed, on each populated channel.
 Lockstep or Mirroring Modes require that for any channel pair that is populated with
memory, the memory population on both channels of the pair must be identically sized.
4.2.2.3 Publishing System Memory
The BIOS displays the “Total Memory” of the system during POST if Quite Boot is disabled in
the BIOS setup. This is the total size of memory discovered by the BIOS during POST, and is
the sum of the individual sizes of installed DDR3 DIMMs in the system.
The BIOS displays the “Effective Memory” of the system in the BIOS setup. The term Effective
Memory refers to the total size of all DDR3 DIMMs that are active (not disabled) and not used
as redundant units.
The BIOS provides the total memory of the system in the main page of the BIOS setup. This
total is the same as the amount described by the first bullet above.
If Quite Boot is disabled, the BIOS displays the total system memory on the diagnostic screen at
the end of POST. This total is the same as the amount described by the first bullet above.
4.2.2.4 RAS Features
The server board supports the following memory RAS modes:
 Independent Channel Mode
 Rank Sparing Mode
 Mirrored Channel Mode
 Lockstep Channel Mode
Regardless of RAS mode, the requirements for populating within a channel given in the section
0 must be met at all times. Note that support of RAS modes that require matching DIMM
population between channels (Mirrored and Lockstep) require that ECC DIMMs be populated.
For RAS modes that require matching populations, the same slot positions across channels
must hold the same DIMM type with regards to size and organization. DIMM timings do not
have to match but timings will be set to support all DIMMs populated (that is, DIMMs with slower
timings will force faster DIMMs to the slower common timing modes).